I am new to Virtex 5 which has an embedded PPC440 core in it (XC5VFX70T). I am using the Xilinx ML507 board for my design.
I created the embedded core using XPS and instantiated it in my HDL project. As peripherals, I am using a DDR2 controller, BRAM, SRAM, one UART and a few GPIOs. However, I could not see any address/data bus ports from the embedded core which I can use in the FPGA fabric.
I have a few RTL IP cores which require memory mapping. How do I connect these IP cores to PPC440 core? Also there are a few registers implemented in the FPGA fabric which are used for system initialization. I want the PPC440 core to write to these registers during initialization. How can I achieve this if the embedded core doesn't have address/data bus as external ports?