# Common mode voltage elimination at differential pair receiver

Can you please explain to me how is common mode voltage of differential pairs is eliminated at receiver side? For example, if on RS422/485 bus there is more different transceivers (drivers and receivers), and they all have different common mode voltages. When the buss is idle, there should be common voltage of the driver that is ready to send applied on the bus, am I right? When driver sends data, than receivers with different common mode voltage rejections receive a same differential signals with drivers common voltage and current is flowing through termination resistor, still correct? At input circuit of those receivers there are two transistors, and there is current source, now I don't understand how the output signal is regulated, regarding to common voltage. Can you please try to explain this? Other additional question is, how come some receivers have common mode voltage rejection +-7V and power supply is 5V?

I hope question is not to extensive and unclear, please give me any feedback.

EDIT:

How this circuit suppresses different common mode voltage levels? Is this because of current source?

• You words started off clear then went into the land of gobbledygook – Andy aka Feb 5 '16 at 11:38
• One driver has 1V common mode voltage and other has 3V, for example. How come a same receiver recognize both signals? whether it is a little clearer? – Haris778 Feb 5 '16 at 11:43
• Notice how the input transistors have their sources commoned, and fed from a current source? That means that, whatever the source voltage is, the current is the same. That means that Ii1 and Ii2 are independent of the source voltage and thus independent of the common mode input voltage. – Brian Drummond Feb 5 '16 at 15:04

I can't pretend I understand the scenario you are painting in your question but here's a brief explanation of how common mode rejection works. Look at the picture below - it shows both inputs connected to an AC signal that represents the common mode voltage: -

There is no real wanted signal just the unwanted common mode voltage. OK so far?

Think about Q1 first. If its base voltage rises a little bit then so does its emitter - this is natural transistor action and applies to MOSFETs or JFETs too. The effect of the emitter rising (common to both transistors) is that Q2's emitter rises and, because its base has also risen, there is very little net increase in base current into Q2 (or Q1).

The lack of change in base current for a significant change in the common-mode base voltage means very little change in either transistor's collector current. Very little change in collector current means very little change in collector voltage.

Hence, an identical significant change in base voltage on BOTH transistors results in very little change in collector voltage. This is the beginnings of largely rejecting a common mode (interfering) signal.

Simple statement: The gain of a differential pair amplifier to a common mode signal is significantly smaller than its gain when presented with a differential signal.

However, given that there is actually a small change in collector voltage for a significant change in common-mode base voltage, it is useful to note that both collectors will rise and fall together due to this significant common mode input voltage. This is very important because if a differential signal is applied the collectors go in opposite directions.

So, if the collectors were then fed as "a pair" to another set of differential inputs, common-mode signal rejection (in this 2nd pair) would be increased as a square term. In other words, if the first stage reduced common mode voltages by 10, the 2nd stage would reduce the common mode voltage by 100.

EDIT to cover the question about common-mode range exceeding power supply: -

Here is the equivalent circuit of the A and B inputs to a RS485 transceiver (SN65HVD485E): -

Note the external input is attenuated because of the 180 kohm and the two 36 kohm resistors and, although the device runs from 5V, it can handle input common mode voltages (absolute maximum ratings) of -9V to +14V.

• You don't need to pretend, that is exactly what I thought when ask a question. Now I realized some things that I did not notice and thank you. – Haris778 Feb 5 '16 at 12:50
• Do you now understand that the level of the common mode voltage between different drivers is now largely irrelevant? BTW I edited my answer briefly. – Andy aka Feb 5 '16 at 12:54
• @Anda aka, yes I see because the same voltage (common voltage) is applied to both transistors, and the collector's voltages are the same (same transistors, same base or gate voltage,and same emitter resistor), then when differential signal is applied, we can see changes because different voltage is applied at gates or bases of transistors, which will cause different currents. Thank you very much. – Haris778 Feb 5 '16 at 13:00
• One additional question. What happens when common voltage at driver has a higher voltage level than power supply of the receiver? Because there are some receivers that supports common voltages out of the supply voltage range. – Haris778 Feb 5 '16 at 13:40
• Yes, I forgot to answer this. It will use a more complex approach to the input transistors and one method is to use a potential divider on each input so that the actual input (on the outside world) is (say) double the input voltage on the bases of the transistors. Take a look at pg 13 of this: google.com/… - look at the A and B input attenuators with 180 k resistors – Andy aka Feb 5 '16 at 13:49

To detect a differential signal which is superimposed on a commonmode signal all you need to do is subtract the signals !

Differential signals need 2 conenctions to transport 2 signals.

$$Vp = Vcmm + Vdata$$

$$Vn = Vcmm - Vdata$$

Then after subtraction you get:

$$Vwanted = (Vcmm + Vdata) - (Vcmm - Vdata) = 2 Vdata$$

Have you read this wikipedia article ?

The circuit (an NMOS differential pair). Is just one example of many circuits which can be used to amplify or buffer the signals. By itself this circuit suppresses the commonmode voltage but it does not subtract the signals. This can be done with some current mirrors for example. Or the signal could be fed to an AD converter so the subtraction can be done in the digital domain.

If you want to learn why a differential pair suppresses the common mode voltage I suggest you read a textbook about analog circuit design. The differential pair is a very standard building block so it is easy to find out more about it.

• That exactly is, how it suppresses those variatons? If there can be transmitters with different common mode voltage levels, how come a same receiver can recognize both of them? – Haris778 Feb 5 '16 at 12:41
• Read Andy's answer ! – Bimpelrekkie Feb 5 '16 at 12:43