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What is the highest number of transistors that can be used within a gate? Very open ended and general question, but I'm trying to gain a better understanding for digital logic.

In terms of chips, I'd like to understand what a general ratio is for transistors to gates.

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closed as too broad by Robherc KV5ROB, PeterJ, Transistor, Daniel Grillo, pjc50 Mar 8 '16 at 17:15

Please edit the question to limit it to a specific problem with enough detail to identify an adequate answer. Avoid asking multiple distinct questions at once. See the How to Ask page for help clarifying this question. If this question can be reworded to fit the rules in the help center, please edit the question.

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    \$\begingroup\$ Welcome to SE. Please explain your question. i.e., State what you are really trying to understand and then ask a question that can be answered. \$\endgroup\$ – Transistor Feb 6 '16 at 0:09
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    \$\begingroup\$ If you needed a 1000 input AND gate, it would use a fair few transistors... \$\endgroup\$ – Tom Carpenter Feb 6 '16 at 0:18
  • \$\begingroup\$ How about a 1000 input OR gate? :^) \$\endgroup\$ – Michael Karas Feb 6 '16 at 0:25
  • \$\begingroup\$ So would it be fair to say that gates tend to use less than, say, 10'000 transistors generally? \$\endgroup\$ – A. Joseph Desmond Feb 6 '16 at 0:25
  • \$\begingroup\$ Also, how about for basic gates? (2 input AND, OR XOR, etc.) I've heard of a rule as follows: NAND, NOR, NOT: transistors = 2 * # of inputs AND, OR, transistors = 2 * # of inputs + 2 Is this true? Or only true for particular designs? \$\endgroup\$ – A. Joseph Desmond Feb 6 '16 at 0:59
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A gate uses as many transistors as needed or as can be used with the accompanying voltage level. A 1000 input AND or OR gate would be untenable in most modern CMOS processes of the last... ever. A great way of understanding the number of mosfets (and thus inputs) is to understand how much voltage it takes to turn on and off a MOSFET and how many are "vertically" in between the power rails and the output.

Picture example:

schematic

simulate this circuit – Schematic created using CircuitLab This is a 4 input NOR gate. Short, sweet, and technically correct in all ways other than the M numbering system. See how there are 5 transistors between VDD and ground? Your VDD must be high enough to place those 4 pmos into saturation. That's your limit. Oh, you also get to combine that with the gate-source break-down voltage limit. Which means for any given process there is, in fact, a maximum number of inputs to a logic gate (not to be confused with inputs to mosfet gates, which is generally one).

Now if you wanted to calculate all this, you'd need to know a lot of device physics. My example with NOR doesn't suffer from back-gate effects like the other logic gates do. Then there's current limitations and it just gets messy enough to be hard for people. Computers are your friend in this case.

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There's no limit to the number of transistors that can be used to construct a gate, but it makes the most sense to use as few as possible, so it's likely that your question is posed bass-ackwards.

Here's a TTL NAND gate, in a few different flavors, from TI. Note that in its simplest implementation it takes only four transistors to get the job done.

enter image description here

There are five basic gates, the inverter, (or NOT) the AND, the NAND, the OR, and the NOR, and you can go to TI's website and get schematics for them all to get a better idea of transistor counts.

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  • \$\begingroup\$ Note that an open-collector version, such as the 7403, probably gets by with only 2 transistors. \$\endgroup\$ – WhatRoughBeast Feb 6 '16 at 1:08
  • \$\begingroup\$ @WhatRoughBeast: The 7403 uses three transistors, while the 'LS03 uses two. \$\endgroup\$ – EM Fields Feb 6 '16 at 1:25

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