# Ultra low power 555 timer circuit

I am trying to design a circuit involving an LMC555 CMOS timer operating as a monostable multivibrator. Essentially, I want a momentary switch to turn on a set of LEDs for ~20 seconds and then turn off. Details about the circuit can be found at http://www.electronics-tutorials.ws/waveforms/555_timer.html.

Based on my requirements, I am running this circuit off of a 9v battery. Ideally, I would like this circuit to draw as little current as possible when it is inactive (hopefully ~20uA or less) so that the battery might last a year or so (the circuit will only be "active" about 0.1% of the time). After building the circuit, I measured the current from the battery to be roughly 200uA, which is well inside the spec of the part. However, I wanted to see if I could make this much lower.

In order to limit the current drawn when the timer is off, I tried to design a latching circuit that would stop current from flowing to Vcc when the output is 0v (and the switch hasn't been pressed). The design is heavily influenced by Kevin Darrah's video "Low Power Arduino! Kill Power Circuit Tutorial" on YouTube.

The actual circuit I built looks something like this.

When I implement this circuit on a breadboard, I get weird results. When connecting pin 2 (trigger) to the NMOS/PMOS, the pin is pulled to ground and the output stays high. Doing a little more investigation, about 6 mA is flowing into the trigger when the 555 timer is completely off (which seems incredibly odd). It appears the circuit misbehaves whenever the trigger is connected to the MOSFETS. I have gotten this circuit working by manually connecting this wire to 9v/Gnd but find that the circuit draws 3mA.

Anyways, can anyone help explain why this circuit doesn't work in practice? In addition, if you could recommending a new method of deceasing the current to the chip that would be awesome. If you need more information or other measurements, I can provide those as well. Unfortunately I'm stuck with using the LMC555 so I can't perform any drastic changes to my design in that respect.

• The 555 is not exactly designed for low-power applications. As silly as it sounds, you might be better served by a small 8bit MCU in deep sleep. Modern MCUs can draw less than 100nA. – uint128_t Feb 10 '16 at 1:05
• @uint128_t They tend to draw rather more when supplied with 9V though. – Spehro Pefhany Feb 10 '16 at 3:10
• @SpehroPefhany Good point, I kinda neglected that. There are 5V regulators with sub 1uA Iq though. – uint128_t Feb 10 '16 at 3:18
• Also note that within the LMC555 there is a fixed voltage divider from V+ to GND that feeds the references of the comparators. Per the TI spec this is a string of 3 - 100k resistors. So with a 9V supply there is already a 30uA drain before you even add in the current to run the rest of the chip. (If you could run the chip at 1.5V the spec says the typical supply current would be 50uA.) – Nedd Feb 10 '16 at 4:10
• Is the 555 a requirement? You might go for a soft latch power switch which shuts itself down via some simple cap based mechanism. It somewhat reminds me of this question, but with far less requirements: electronics.stackexchange.com/questions/196673 – PlasmaHH Feb 10 '16 at 11:00

If you're "stuck" with a 555, this should work for you:

I don't have an LMC555 model, so I worked it out with a bipolar 555 and got less than 20nA of quiescent current between pulses.

Also, I picked the MOSFETs semi-randomly from the LTspice library, so you may want to pick something else which may be more appropriate for your needs.

HOW IT WORKS:

S1 is a Normally Open momentary pushbutton switch, and when it's open, Q2 (an N channel enhancement mode MOSFET) gate is pulled to ground through R1, turning Q2 OFF and disconnecting Q2 drain from ground. this causes Q1 (a P channel enhancement mode MOSFET) gate to be connected to the positive supply rail (V1+)through R2, turning Q2 OFF, which will disconnect Q1 drain from the positive supply rail. Under these conditions, U1-8 will be disconnected from V1+ and U1 will therefore draw no current from the supply.

When S1 is made, Q2 gate will be connected to V1+ through R3, turning Q2 ON and connecting Q2 drain to ground. This will pull Q1 gate down to ground through R4 and Q2, turning Q1 ON, which will connect V1+ to U1-8, the chip's power input pin.

At the same time, C2 will start charging up to V1+ through R6, which will bring U1 out of RESET, and a negative spike will be generated at U1-2 by C1 being abruptly connected to ground through Q2. The negative spike at U1-2 will trigger the timer and cause U1-3 to go high for 1.1 RtCt seconds, and this pulse will be output from the circuit and used externally.

The pulse is also used internally to keep Q2 gate high for the duration of the pulse by connecting U1-3 to Q2 gate through D1. This high will persist for the duration of U1's output pulse and serves to keep Q1 and q2 latched ON after S1 is released, which will keep U1-8 connected to V1+ until the pulse times out.

When that happens, Q2 will turn OFF, which will turn Q1 OFF, which will in turn disconnect U1-8 from V1+, turning U1 OFF and causing U1 to draw essentially zero quiescent current from V1 until the next time S1 is pressed, starting the cycle anew.

Here's the LTspice circuit list just in case you want to play with the circuit. Enjoy! :)

Version 4
SHEET 1 880 884
WIRE -656 64 -896 64
WIRE -464 64 -656 64
WIRE -400 64 -464 64
WIRE -256 64 -304 64
WIRE -160 64 -256 64
WIRE 256 64 -160 64
WIRE 304 64 256 64
WIRE -464 112 -464 64
WIRE -256 112 -256 64
WIRE -160 112 -160 64
WIRE 304 112 304 64
WIRE -656 128 -656 64
WIRE -704 144 -768 144
WIRE 0 176 -64 176
WIRE 256 176 256 64
WIRE 256 176 224 176
WIRE -464 224 -464 192
WIRE -384 224 -384 112
WIRE -384 224 -464 224
WIRE -384 240 -384 224
WIRE -352 240 -384 240
WIRE -256 240 -256 192
WIRE -256 240 -288 240
WIRE -240 240 -256 240
WIRE -112 240 -240 240
WIRE 0 240 -112 240
WIRE 304 240 304 192
WIRE 304 240 224 240
WIRE -384 304 -384 240
WIRE -32 304 -96 304
WIRE 0 304 -32 304
WIRE 256 304 224 304
WIRE 304 304 304 240
WIRE 304 304 256 304
WIRE -896 320 -896 64
WIRE -768 320 -768 144
WIRE -240 336 -240 240
WIRE 304 352 304 304
WIRE -160 368 -160 192
WIRE -112 368 -160 368
WIRE 0 368 -112 368
WIRE -384 416 -384 384
WIRE -160 448 -160 368
WIRE -32 464 -32 304
WIRE 352 464 -32 464
WIRE -656 496 -656 208
WIRE -576 496 -656 496
WIRE -544 496 -576 496
WIRE -432 496 -464 496
WIRE -656 544 -656 496
WIRE -576 544 -576 496
WIRE -576 656 -576 608
WIRE -32 656 -32 464
WIRE -32 656 -576 656
WIRE -896 688 -896 400
WIRE -768 688 -768 400
WIRE -768 688 -896 688
WIRE -704 688 -704 192
WIRE -704 688 -768 688
WIRE -656 688 -656 624
WIRE -656 688 -704 688
WIRE -384 688 -384 512
WIRE -384 688 -656 688
WIRE -240 688 -240 400
WIRE -240 688 -384 688
WIRE -160 688 -160 512
WIRE -160 688 -240 688
WIRE -64 688 -64 176
WIRE -64 688 -160 688
WIRE 304 688 304 416
WIRE 304 688 -64 688
WIRE -896 784 -896 688
FLAG -896 784 0
FLAG 352 464 OUT
FLAG -112 368 RESET
FLAG -112 240 TRIG
FLAG 256 304 RtCt
FLAG -96 304 OUT
SYMBOL Misc\\NE555 112 272 R0
SYMATTR InstName U1
SYMBOL res 288 96 R0
WINDOW 0 49 44 Left 2
SYMATTR InstName Rt
SYMATTR Value 1.8meg
SYMBOL cap 288 352 R0
WINDOW 0 42 31 Left 2
WINDOW 3 25 0 Left 2
SYMATTR InstName Ct
SYMATTR Value 10µ
SYMBOL Misc\\battery -896 304 R0
WINDOW 0 13 94 Left 2
WINDOW 3 15 12 Left 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR InstName V1
SYMATTR Value 9V
SYMBOL pmos -304 112 M270
WINDOW 0 -15 66 VLeft 2
WINDOW 3 69 96 VLeft 2
SYMATTR InstName Q1
SYMATTR Value FDS4465
SYMBOL nmos -432 416 R0
WINDOW 0 63 30 Left 2
WINDOW 3 70 66 Left 2
SYMATTR InstName Q2
SYMATTR Value FDS6630A
SYMBOL res -672 528 R0
SYMATTR InstName R1
SYMATTR Value 10k
SYMBOL sw -656 224 M180
SYMATTR InstName S1
SYMBOL voltage -768 304 R0
WINDOW 3 24 96 Invisible 2
WINDOW 123 0 0 Left 2
WINDOW 39 0 0 Left 2
SYMATTR Value PULSE(0 1 10 10m 10m 100m)
SYMATTR InstName V2
SYMBOL diode -560 608 R180
WINDOW 0 -35 32 Left 2
WINDOW 3 -69 -3 Left 2
SYMATTR InstName D1
SYMATTR Value 1N4148
SYMBOL res -448 208 R180
WINDOW 0 36 76 Left 2
WINDOW 3 36 40 Left 2
SYMATTR InstName R2
SYMATTR Value 100k
SYMBOL cap -144 448 M0
WINDOW 0 -42 35 Left 2
WINDOW 3 -37 70 Left 2
SYMATTR InstName C2
SYMATTR Value 10n
SYMBOL res -144 96 M0
WINDOW 0 -46 39 Left 2
WINDOW 3 -63 66 Left 2
SYMATTR InstName R6
SYMATTR Value 1meg
SYMBOL res -272 96 R0
WINDOW 3 34 68 Left 2
SYMATTR Value 100k
SYMATTR InstName R5
SYMBOL cap -288 224 R90
WINDOW 0 0 32 VBottom 2
WINDOW 3 32 32 VTop 2
SYMATTR InstName C1
SYMATTR Value 10n
SYMBOL res -448 480 R90
WINDOW 0 -32 56 VBottom 2
WINDOW 3 -32 58 VTop 2
SYMATTR InstName R3
SYMATTR Value 1000
SYMBOL res -400 288 R0
WINDOW 0 -42 42 Left 2
WINDOW 3 -58 71 Left 2
SYMATTR InstName R4
SYMATTR Value 1000
SYMBOL diode -224 400 R180
WINDOW 0 41 30 Left 2
WINDOW 3 24 0 Left 2
SYMATTR InstName D2
SYMATTR Value 1N4148
TEXT -880 720 Left 2 !.tran 50 startup
TEXT -880 752 Left 2 !.model SW SW(Ron=.01 Roff=1G Vt=0.5 Vh=0)
TEXT 32 504 Left 2 ;Output pulswidth =
TEXT 32 536 Left 2 ;1.1 RtCt seconds

• I don't think this is going to work the way you think that it will. R4 is going to be consuming current because of the internal clamp diodes on each pin of the 555. Why not instead treat the CMOS 555 timer as a simple (accurate) inverter? Ignore pin 7; tie pins 6&2 together, then feed those pins with a RC network of the desired delay. Cap (+) to Q2d; Cap (-) to discharge resistor (other side to ground) and to pins 6&2. Even simpler: Cap (-) to Gnd, Cap (+) to charging resistor to Pin8, junction of cap & resistor to pins 6&2. – Dwayne Reid Feb 10 '16 at 10:49
• @DwayneReid: R4 is 100 kohms, so even if it were shorted to ground it'd only allow 90 microamperes to pass. Since the clamp diodes are wired with the upper one's cathode to the positive rail and the lower one's anode to ground, the only current that can get through the bottom diode (since it'll be reverse biased) will be the diode's leakage current. Then, since the upper clamp diode's cathode will be on the drain side of Q1, it'll only be allowed to pass $I = \frac {Vdrain - Vsource}{100k\Omega}$ which is cdertainly nothing to get your knickers in a bunch about. – EM Fields Feb 10 '16 at 12:01
• @DwayneReid: If you don't think it'll work the way I think it will, I'd appreciate seeing an answer with some hard numbers rather than having to slog through opinion. Perhaps you could answer the OP's query with a schematic, a sim, a circuit description, etc., etc., etc., showing a better way than mine? – EM Fields Feb 10 '16 at 12:10
• @EMFields: I tried out this circuit on a breadboard and it works great! Admittedly, I could not get the 20 nA quiescent current that you achieved. I ended up getting more like 9-10 uA. The entire current seems to be flowing through R4 and into pin 2 (a similar problem I was having before). When the output goes high, this current drops to 0A. Not sure if that provides any clues as to what is going on. But I am very satisfied with the 9 uA I am getting now. Any ideas why this somewhat significant current exists? – Anthony Feb 12 '16 at 22:32
• @Anthony: Part 1. Thanks for the accept. :) The reason for the current is probably that in the real-world part there's probably a fairly low-leakage path from the trigger input to ground and in my model there isn't. Which 555 are you using? Just as an aside, I connected R4 to V1+ instead of the switched +9V because when Q2 switched on it pulled U1-2 down to about -9 volts, not a Good Thing. The fix is to connect R4 to Q1 drain and a diode from U1-2 to ground, anode to ground. – EM Fields Feb 13 '16 at 4:58

The main problem I see is that you want the trigger input to be higher than the V+ input when the LMC555 is off, and that violates this requirement:

It's there because there is a diode-like structure inside the chip from each input to V+, for input protection. You are forward biasing that diode, and drawing a relatively high current. Since you are limiting the current to something reasonable you've probably not damaged the chip despite violating the Abs max ratings (a rare case where this is true).

You may be able to make this work by adding this:

simulate this circuit – Schematic created using CircuitLab

V+ refers to the pin on the chip, as does trigger.

• Unfortunately, I couldn't get your simpler design to work. I needed to use EM Fields' solution. But thanks for your explanation of a possible problem. I do see a small current flowing into the trigger even with the solution so maybe this is the cause. – Anthony Feb 12 '16 at 22:36

Since low power is a important criterion, don't use the evil 666 555 timer. There are much better ways, including a few discrete parts.

If this problem came up in the real world, I'd use a tiny microcontroller like the PIC 10F200. It would stay in sleep most of the time. A button press wakes it up. This causes it to turn on the LEDs, wait 20 seconds, turn the LEDs off and go back to sleep. There are other PICs that are a little larger but have even less sleep current. You should be able to get this down to below 1 µA worst case.

• During shutdown (any time the pulse isn't active) my klunky old evil 555 timer circuit draws less than 20 $\style{color:red;font-size:100%}{nano}amperes$ from the 9 volt source. Not too shabby, eh? – EM Fields Feb 12 '16 at 16:53
• @EMFi: Using a external switch like that can be applied to any timing component, not just a 666. It can be done with a microcontroller too, for example. While this is a interesting intellectual execise, note that 1 uA is already so low that even a coin cell is limited by its shelf life, not capacity. 1 uA continuous is only 8.8 mAh/year, or over 11 years just to get to 100 mAh. Except for exceptional cases, this is well into diminishing returns territory. – Olin Lathrop Feb 12 '16 at 22:06
• @Anthony asked specifically for a solution using a 555, not a microcontroller - which makes it an exceptional case - and is happy with my solution viz his comment to that effect and his accept, which is what matters. Nonetheless, you pooh-pooh the effort and the solution and try, as usual, to force yourself into the limelight with irrelevant twaddle and slurs ( 666 instead of 555 and "diminishing returns") designed to trivialize the contributor and the contribution. Sounds to me like the NIH varietal of sour grapes. – EM Fields Feb 13 '16 at 3:08
• @EMFi: You've been around here long enough to know that people often ask for specific solutions when they really have a higher level problem to solve, and the specific solution is all they can imagine to address it. By exceptional cases, I was referring to those where 1 uA versus 500 nA actually matters. It's useful to broaden people's perspective and introduce them to useful parts like microcntrollers. Not all may want to do the learning to get to where they are useful tools, but some will, whether the OP or not. There is nothing wrong with showing different approaches. – Olin Lathrop Feb 13 '16 at 13:15
• Olin, you're preaching to the choir. Quoting from @Daniel's original post, we have "I am trying to design a circuit involving an LMC555 CMOS timer operating as a monostable multivibrator." Then, after describing his current (amperage) requirements, he concludes with: "Unfortunately I'm stuck with using the LMC555 so I can't perform any drastic changes to my design in that respect." With all that in mind, broaching the subject of a microcontroller seems rather less than an attempt at teaching/being helpful and more like an attempt at self-aggrandization in that it's totally irrelevant. – EM Fields Feb 13 '16 at 17:35

Try using one of the ultra low power timers from Ti. Something like the TPL5111 might do the trick

• While this may be a good alternative, it doesn’t address the question. Specifically, “can anyone help explain why this circuit doesn't work in practice” and “Unfortunately I'm stuck with using the LMC555”. – Blair Fonville Oct 3 '18 at 1:15