About this question

I do not have an electronics engineering background, and this is one of my first challenges with communicating via I2C, and with writing to a register, so please do not assume too much knowledge from my side. I'm programming an Arduino.

When asking about a specific electronic component/chip, I assume people can not experiment/test to give me a correct answer. I also expect that people will not even know this component. Therefore I will try to add much information in this question.

Please let me know if you need more information.

The component has four ADCs

I am using the 4-channel component, MCP3424 (datasheet). It comes in two packages. I'm using the MCP3424 E/SL, 4 channel SOIC version, not the MCP3422 or MCP3423 2 channel version.

I believe it has four ADCs. On RS-Online, it seems like the E/SL version has 4 ADCs (direct link), while the E/ST has only one (direct link). enter image description here

I assume this must mean, that it can do sampling on several channels simultaneously. I don't see any other reason to put more than one ADC on the component.

Am I right?

Communication via I2C

Communication happens by sending one config byte, then waiting for a sampling to end, and read the result.

Format of Config Byte

enter image description here

The interesting ones are:

  • bit three from left, counting from 1: Continous sampling
  • bit one and two from left, counting from 1: Address

More about the config byte can be found on the datasheet page 18, also depicted here.

Format of read result

My examples will only be with an 18 bit resolution (bit 5 and 6 set to 1). The read back result will be four bytes: the first three containing the value, and the fourth containing the config byte.

However, the leftmost bit, !RDY, tells if the value is "new", ie if it is a new reading, since the last reading. The first time reading one result, the value is 0, and for the subsequent ones it is 1, until the ADC is ready with a new sample value.

How to use it without sampling in parallel

I know perfectly well how to do this. And all examples I have found online, also simple du this. Just write a config byte to the component, then read a value back.

How to set each channel to sample automatically contiously, and read the channels in parallel

The pseudo code could be smth like

    start sampling channel 1, 18bit, 0gain, continuously
    start sampling channel 2, 18bit, 0gain, continuously
    start sampling channel 3, 18bit, 4gain, continuously
    start sampling channel 1, 18bit, 2gain, continuously

    // Run every 500ms
    // 18 bit samples take 375ms, so must happen in parallel 
    // to get a new sample for all every 500ms
    read channel 1
    read channel 2
    read channel 3
    read channel 4

My best attempt

So I hope, that the following sets each ADC to sample continously. This is Arduino code.

void setup() {


Then, how do I read a specific channel. If I just ask the component for the result, it will return the result of the channel on the register. With the setup above, I would get the reading for channel 4. But let's say I want the reading from channel 2. In some way I just need to tell it, that I want the result of channel 2. I don't want to ask it to sample anything, it should just keep doing a continous sampling, and I just want the most resent sample that it created while automatically sampling.

Below is my best guess

void readADCs() {

    // Channel 1
    // ...

    // Channel 2
    Wire.write(0b01011100); // I hope not to affect, just to select
    Wire.read(); // val byte 1
    Wire.read(); // val byte 2
    Wire.read(); // val byte 3
    Wire.read(); // config byte

So my best guess is. If I want to read channel 2, I write a config byte which is exactly the same, as what I used for starting sampling channel 2.

However, this does not work. There is no sample ready, even if it has had more than the necessary 375ms.

How do I achieve this?

I have tried to do my best with describing the desired result and what I have tried, but I know it isn't easy to read.

Could you give me advice on how to let all ADCs sample in parallel, and then read from them, without interfering?

  • \$\begingroup\$ Good start. The only thing missing is a link to the datasheet for the MCP3424, which I've added. \$\endgroup\$
    – JRE
    Feb 10, 2016 at 12:21
  • \$\begingroup\$ MCP3424 comes in two packages, not versions, and both are 4 channels. ST is TSSOP, SL is Soic. There is the MCP3422 2 channel, fixed address, MCP3423, 2 channel, adjustable address, and MCP3424 4 channel. \$\endgroup\$
    – Passerby
    Feb 10, 2016 at 12:34
  • \$\begingroup\$ +1 Very thorough, well written question. Sadly that chip is a single ADC. That is illustrated in its datasheet in the "Functional Block Diagram". You have read input channels as meaning ADCs. Having many input channels allow one ADC to be used to sample many different signals (sequentially). The ADC is much more expensive to make than an analogue multiplexer (which selects the channel), and sampling multiple signals is a common requirement. Hence the ADC chips often work this way. Andy aka has answered your question, but maybe wait before accepting, as you might get more information. \$\endgroup\$
    – gbulmer
    Feb 10, 2016 at 12:34
  • \$\begingroup\$ I believed it had 4 ADCs, because RS-Online said that E/SL had 4, and E/ST had 1. I've added to the description \$\endgroup\$ Feb 10, 2016 at 13:34
  • 2
    \$\begingroup\$ @MadsSkjern ignore RS, Microchip and their data sheet is king. That's a mistake on RS. Mistakes on distributor sites are pretty common. \$\endgroup\$
    – Passerby
    Feb 10, 2016 at 13:34

2 Answers 2


I have the latter with four ADCs. I assume this must mean, that it can do sampling on several channels simultaneously.

Unfortunately not. There is only one ADC and, to convert more than one channel, this has to be done sequentially by addressing the internal multiplexer thus "reading" another channel. No simultaneous sampling unfortunately: -

enter image description here

Note the input multiplexer selects ONLY one of four channels at any one time. This is quite a common method used to read multiple channels but there are simultaneous sampling ADCs out there. Try looking at Linear tech, TI's or ADI's portfolios.

  • \$\begingroup\$ +1, ya beat me :-) It might be worth spelling out the fact that it is quite common for one ADC sample multiple channels, because it can sample different analogue signals, which is a common case. \$\endgroup\$
    – gbulmer
    Feb 10, 2016 at 12:29
  • \$\begingroup\$ Also, if low sampling rates are called for, multiplexing/interleaving is often good enough \$\endgroup\$ Feb 10, 2016 at 12:37
  • \$\begingroup\$ Spiffing improvements, sir. \$\endgroup\$
    – gbulmer
    Feb 10, 2016 at 12:46
  • \$\begingroup\$ @gbulmer you are too kind sir!! \$\endgroup\$
    – Andy aka
    Feb 10, 2016 at 14:09

The MCP3424 is a single ADC with a multiplexer on the front end.

This diagram from the datasheet shows this quite clearly

MCP3424 Architecture

The datasheet backs this up with the introduction:

4.1 General Overview

The MCP3422/3/4 devices are differential multichannel low-power, 18-Bit Delta-Sigma A/D converters with an I2C serial interface. The devices contain an input channel selection multiplexer (mux), a programmable gain amplifier (PGA), an on-board voltage reference (2.048V), and an internal oscillator.

Therefore, you cannot convert different channels truly simultaneously, but you could sample the channels sequentially with relatively short delay between them.

When using the device, you need to ensure that the I2C address bits are stable; once more, from the datasheet:

The MCP3423 and MCP3424 have two external device address pins (Adr1, Adr0). These pins can be set to a logic high (or tied to VDD), low (or tied to VSS), or left floating (not connected to anything, or tied to VDD/2), These combinations of logic level using the two pins allow eight possible addresses. Table 5-3 shows the device address depending on the logic status of the address selection pins. The device samples the logic status of the Adr0 and Adr1 pins in the following events:

a. Device power-up.

b. General Call Reset

(See Section 5.4 “General Call”).

c. General Call Latch

(See Section 5.4 “General Call”).

The device samples the logic status (address pins) during the above events, and latches the values until a new latch event occurs. During normal operation (after the address pins are latched), the address pins are internally disabled from the rest of the internal circuit.

It is recommended to issue a General Call Reset or General Call Latch command once after the device has powered up. This will ensure that the device reads the address pins in a stable condition, and avoid latching the address bits while the power supply is ramping up. This might cause inaccurate address pin detection.

I would suggest you follow this recommendation to ensure you really are communicating with the device.

To read a particular channel, you must select the channel in the Configuration register and start a conversion. The RDY bit will go low when the result of that conversion is available in the output register.


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