Why doesn't the current in long channel nMOS decrease with drain voltage due to pinch off that takes place when gate voltage at a point in the channel is less than the threshold.

  • \$\begingroup\$ In a different universe it does. \$\endgroup\$ – Andy aka Feb 12 '16 at 15:40

Your question could use some updating as it is not clear; however, if you have a "long channel" device, you are assuming that you do not have drain dependencies due to charge sharing at the drain/source edges. Also, you do not have "pinch off" when you are less than threshold. You have a barrier in subthreshold, so that the current will be completely dependent on the barrier height, as this is the nature of drift (subthreshold) operation of the device.

common source nFET

In the picture above, Psi_S is the surface potential, and the barrier is Phi_{SC}, so the current is fixed by Phi_{SC}. The voltage you see at the drain will be decreased by the length of the device.

The EKV model is uses pinchoff for the boundary between drift and diffusion transport, so I you really care about the effects of pinchoff, I would start there.

Alternatively, what you might be looking for is the effect of pinchoff at the drain. The resistance of this region can be completely neglected for most purposes. You have a gate to substrate voltage to invert the channel, but the drain voltage will tie back into the channel edge and give you a "not quite" inverted region in the V_{ds} > V_{gs}-V_t.

I would sit down and start doing some band diagrams and the solution should come to you fairly quickly.

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  • \$\begingroup\$ Thanks for your effort. I am expecting the answer in simple terms. Your band diagram doesn't seem to help. Also it would be easier if you apply to a single nMOS rather than the CMOS. \$\endgroup\$ – SAKhan Feb 13 '16 at 6:28
  • \$\begingroup\$ CMOS is just complimentary MOS, so the nMOS band I supplied is adequate. Good luck with your academic endeavors. \$\endgroup\$ – b degnan Feb 13 '16 at 15:47
  • \$\begingroup\$ The band you supplied is pMOS. In any case your explanation is not clear to me. \$\endgroup\$ – SAKhan Feb 13 '16 at 16:19
  • \$\begingroup\$ That is a conduction band diagram of a nMOS transistor, which means it is an energy diagram instead of a potential diagram. Invert it for a potential diagram. Physicists diagram vs. EE diagram. I would start by drawing a "zero bias" condition and then go from there using whatever you book uses as a reference. \$\endgroup\$ – b degnan Feb 13 '16 at 16:41

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