# decreasing base current on saturated npn transistor I would like to know if decreasing the current at the base on a saturated transistor(as in the attached photo) will cause the transistor gain to increase and by that, to maintain the collector current.

For example: in the saturated NPN transistor at the pictured, the gain is x10.So the Ib=2mA,Ic=20mA and the Vce=0.2V.

Let's say that the gain of the transistor in the active state is x100.

If I decrease the Ib current, will the gain of the transistor rise and keep the same Ic current(20mA)?

Also, can the Ib be decreased more and more while maintaining the Ic(20mA)until it reaches its maximum gain(x100)?

If, for example, the Ib will decrease to 1mA and the Ic in result will fall to 10mA, the voltage drop on the transistor(Vce)should be 3.6V(9V-2V-(340ΩX0.01A).

So, doesn't the gain of the transistor be increase by X20 and cause the 1mA to be 20mA again, while keeping that behavior(maintains the same Ic, while the Ib gradually decreases) until it reaches its maximum possible gain?

UPDATE! I meant that when i find the working point of the transistor by cross line the Vce and the Ic(red dot)at the active area,i can find the Ib current in the graph(150uA)and also calculate by this the Hfe at this point(16mA/0.150mA),but when i find the working point of the transistor by cross line the Vce and the Ic(blue dot)at the saturated area(the area on the right of the diagnol common line/the brown arrows)the graph can't tell me nothing about the Ib current or its Hfe as the other case,does it?it seems that it only shows me that it is in saturation state without any values that i can determine by the graph at that point.Am i right?.

• That's not how it works. Vce will increase, which inevitably means a reduction in Ic. However that reduction in Ic will be small, as increasing hFE (as Vce increases) compensates for most (but not all) the reduction in Ib. So for example you may find Ib=1mA (not 2mA) corresponds with Ic = 18 (not 20) mA and hFE=18 not 10. – Brian Drummond Feb 16 '16 at 17:25
• The gain is only reduced because the collector-emitter voltage is small in the saturated transistor. As you reduce base current, VCE will increase slightly. Once you get to the maximum gain, VCE will increase rapidly with decreasing Ib (in fact at a rate of 340 * HFE * delta Ib). – user1582568 Feb 16 '16 at 17:30
• So,the Ic will be reduced anyway,while the Ib decrease.But as the Ib will decrease gradually,the hFE(start point hFEX10)will increase gradually(increasing Vce)in a way that the Ic will not decrease in half ,to 10mA when the Ib decrease in half to 1mA(hFEX10),but will maintain higher current,thank to increasing of the hFE,"..Ic will be 18mA rather 20mA..".And this behavior will continue until it will reach the max. gain.Am i right?And what will be the relationship between the Ic and the Ib after the gain will get to its max.besides the fact that the Vce will increase rapidly with decreasing Ib. – xchcui Feb 16 '16 at 20:55
• Most transistors have datasheets that will show how gain varies at different values of Vce. – Brian Drummond Feb 16 '16 at 22:36
• When you are using the transistor as a saturated switch, it is a best practice to maintain a low beta by maintaining a high base current. Beta of 10 is good. Beta of 20 might be OK, too, depending. This beta is often referred to as the "forced beta" because it is not really an intrinsic characteristic of the transistor. You are forcing it to operate at a low beta by sending a large current through the base. The low forced beta insures that your Vce will be very low, and that normal production variations in beta of the transistor will not have much effect. – mkeith Feb 16 '16 at 23:17

If i decrease the Ib current,will the gain of the transistor will arise and keep the same Ic current (20mA)?

No it won't: - The above shows the relationship between Ic and Vce for various base currents. Each graph is seperate - they do not overlap. If you reduce base current then collector current also reduces.

Some google images show it incorrectly here: - The mistake here is that all the individual curves are seen as merging and of course that merged part of the graph could imply that if you reduced the base current, the collector current would remain constant.

This would be incorrect!

• At each point on the graph that is on the right of the common diagonal line,i can find the Ib at the point that Vce and Ic are meeting and calculate the Hfe of the transistor,while i divide:Ic/Ib of the meeting point on the graph.But when the meeting point on the graph is on the left of the common diagonal line(which means that the Ic/Ib is not valid anymore at this area/saturation)can i find any value on that area?can i do any calculation from that area?or it is just shows the condition of saturation,while i can't use that area as the area on the left(the active one)? – xchcui Feb 28 '16 at 12:46
• I'm not understanding your question. – Andy aka Feb 28 '16 at 14:06
• I update my main question above with additions to your graph in order to clarify my question in my last comment. – xchcui Feb 28 '16 at 15:35
• Ok @xchcui - the orange arrows is a no-go area. Is this what you were asking about? – Andy aka Feb 28 '16 at 17:59
• Yes.But how can i determine the value between those limits?On the one side i can determine the minimum gain for saturated transistor from the datasheet(X20)included the Ic and Ib value.On the other side i can determine by the graph(load line) the Ib and the gain value on the active side until it reach the edge of the active line(in the graph is the cross-line of Vce-1.3V and Ib-21mA)where the Hfe is about X84.But how can i determine the gain between those two value?between Vce-1.3V to Vce-0.1V?it doesn't shown at the datasheet. – xchcui Feb 28 '16 at 20:08