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How can I determine the clock speed requirements of a mCU to manage a given ADC input?
This application is very simple - I just want to take an SPI stream from an ADC into a mCU and spit it out the mCU. No major DSP happening or anything like that on board. [added] The mCU is ultimately there to push the video out a USB port.
In this scenario I have a 40,000 kSPS (40 MSPS) 10bit ADC that I need to push through a 16 bit micro. Do I use a 40MHz micro? Can I use a slower micro?
Your question suggests that the SPI is the input from the ADC. However, the ADS825E is a parallel output device. So, is the SPI the output from the microcontroller? I'll presume it is.
You'll always need a faster clock. Even for a RISC controller running 1MIPS/MHz a 40MHz clock will allow you to execute 40M read instructions per second, but you have extra code, at least a jump instruction to create a loop. So at 80MHz you can read, and jump to the read instruction. But that's not all. If you want to shift the read data out through SPI that will need to be clocked as well. At least 10 clock pulses per read sample, to be precise. Unless you're using an asynchronous microcontroller (I don't know if they already exist outside of the lab yet) that means 400MHz. At least.
You can do this with some high end ARM controllers, but if you just want to read and shift out there are better solutions. Oli mentions an FPGA, but a CPLD will probably do.
Are you sure it's 40Msps? I am not aware of any SPI based ADCs that run that fast - it would require a 400MHz SPI rate for 10-bit :-)
Assuming it's parallel, you would need at least an 80MIPS (i.e. not necessarily clock rate unless it's one instruction per cycle) microcontroller, or one with a suitable peripheral (e.g. DMA from parallel port)
An FPGA would be the preferred tool for something at this speed though.
If you tell us more about what you are trying to do (plus the ADC part number) and confirm exact speed (e.g. 40,0000ksps as written above = 400Msps, not 40Msps) a better answer can be given.
EDIT - converting the parallel ADC output to serial would mean you need to either multiply the clock rate (i.e 40Mhz * 10bit = 400Mhz which is not feasible) or run the ADC at a much slower clock rate.
As mentioned, an FPGA/CPLD can be used to process data very quickly in parallel, so they are made for this type of task.
If you can reduce the Msps requirement a bit, a PIC32 has DMA and a parallel master port (PMP) which IIRC can read every 3 (or possibly 2 under some circumstances, you would have to check the datasheets) instructions (max 80 MIPS)
I have used one (PIC32) to read an 8-bit ADC at around 20-30Msps (short bursts into buffer then sent via USB), though it was just a quick experimental project and an FPGA took over this job in other versions. I remember messing about with an assembler routine to call from the C code (e.g. a long unlooped list of read then write)
Note that this is only reading/sending data in short bursts. You don't mention whether you want to read/write continuously, or how you want to output it (e.g. in what format, how fast) so it's hard to say what you can achieve.
What is certain is that any processing at all will slow things down significantly, and as this will probably include sending it back out (unless a peripheral can be used) I wouldn't hope for much more than 10 Msps (continuous, probably optimistic) doing nothing more than reading and then writing to output directly. If you are reading in short bursts you will probably be able to improve this.
Of course you could look at faster processors (e.g. some ARMs) too, but the cheapest and most flexible way of doing this will be a programmable logic device. I would maybe grab a small dev board (like the Flashy combined with a Pluto from KNJN) and give them a try.
