I'm implementing a simple manually controlled low frequency (120 Hz) PWM which drives MOSFET switching a rather heavy load (battery is 2S Li-poly 7.4V high drain, load current is up to 80A). Simplified schematic of that part of device flollows (I omitted a sawtooth generator and the other parts of device which are not involved here and are physically disconnected from this curcuit during testing anyway):

Initial schematic

AMS1117 here is a 3.3V fixed LDO. I found out that LM393 (actually LM2903) output is oscillating during MOSFET turn-off period:

Oscillogam 1

(Yellow channel is MOSFET drain and cyan one is the LM393 output, note that channel scales are different). After making research I found that LDO output, providing reference voltage to the comparator through R3-R5-R6 divider is guilty:

Oscillogram 2

(Here yellow is LM393 output and cyan is LDO output) Although input and output of LDO and reference voltage input of comparator are debounced with rather large capacitors, LDO output still bounces along with LDO input during transition of MOSFET which significantly affects comparator reference voltage:

Oscillogram 3

I'm mostly newbie in questions of power, my primary skill is MCs and what I usually do to power rails is selecting debouncing capacitor according to IC datasheet. So I had to read some application note from Murata on debouncing and constructed a pi-section filter at LDO input as per their recommendations:

Pi-section filter added

... which didn't change the situation. I mean there's no eye visible change of waveforms on the LDO input oscillorgam after adding a pi-section filter. At this point I realize that either physics works wrong or I don't understand something. I believe the latter is more probable. Any suggestions are appreciated.

P.S. Adding a hysteresis to comparator didn't help either as the oscillation amplitude is over 2 V and hysteresis would be unacceptably huge.

P.P.S. All the measurements are taken regarding to the negative pole of battery.

  • 1
    \$\begingroup\$ Am I missing something here? Neither of your schematics shows the output of the LDO connected to anything other than a capacitor. Are we supposed to assume that it's driving both the comparator and the voltage divider? \$\endgroup\$
    – Dave Tweed
    Feb 21, 2016 at 16:06
  • \$\begingroup\$ Yes, my fault. When was cutting off the rest of schematic, I removed a connection between LDO output and LM393 pin8 by accident. \$\endgroup\$
    – s0me0ne
    Feb 21, 2016 at 18:05

2 Answers 2


It looks like your AMS1117 is becoming unstable during the time shown. As this is when there are going to be transients on the output, any instabilities will show up here, even if the regulator appears ok at a static load.

The datasheet has this to say:


The circuit design used in the AMS1117 series requires the use of an output capacitor as part of the device frequency compensation. The addition of 22μF solid tantalum on the output will ensure stability for all operating conditions.

Your circuit has 1μF, well below the stability criteria. This requirement is not at all unusual for linear regulators (in particular LDO types).

Note that a solid tantalum device will have a somewhat higher ESR than a ceramic, which may also be assumed by AMS in the loop stability requirement.

A standard tantalum 22μF or larger (perhaps an ordinary TAJ series part) should do the trick. The datasheet explicitly states that a larger capacitor will simply improve transient response and not affect loop stability.

Another thing about the circuit is that most device manufacturers recommend a gate resistor (see figure 1) when using a totem pole driver stage as is the case here.



This just goes to show that not all xxx117 regulators are created equally.

Useful graph on this type of LDO regulator:

ESR vs Stability

What is interesting (this is the one from On semiconductor) is that a certain minimum ESR is required for all loads (and it is higher than the ESR most 22μF ceramics).


There are some excellent application notes on gate oscillation and how to tame it; even though the application ones I am linking are for high voltage devices, the fundamental information is still applicable.

Mastering the art of slowness

Mastering the art of quickness

Both from Infineon.

  • \$\begingroup\$ Good catch. It also seems that the Mosfet driver might be drawn incorrectly. \$\endgroup\$
    – Nedd
    Feb 21, 2016 at 14:37
  • \$\begingroup\$ @PeterSmith thanks for that, I'll try it out. Seems like I used different datasheet and I'm sure values recommended was very different from what you provide 'cause I remember I raised them to 10uF and 1uF as provided values seemed too small to me. Just googled AMS1117 and the datasheet under the first link gives me values you mentioned. Weird :) \$\endgroup\$
    – s0me0ne
    Feb 21, 2016 at 15:10
  • \$\begingroup\$ @Nedd, what's wrong with MOSFET driver from your point of view? It's generally a bipolar totem-pole driver taken from some IRF's recommendations, but with my skills in that high-power staff I could easily make some mistake implementing it. On the other side, it works and I'm pretty sure it's implemented exactly as drawn using BC847 and BC857 BJTs. Just forgot to draw a comparator power/reference supply which comes from LDO as you mentioned in your answer. \$\endgroup\$
    – s0me0ne
    Feb 21, 2016 at 15:18
  • 1
    \$\begingroup\$ It looks as though the Mosfet turns on when the comparator is powered off, due to the R7 pull up. If this preferred then no problem. One might assume you'd want the opposite action, hence an inverted driver format would be used here. \$\endgroup\$
    – Nedd
    Feb 21, 2016 at 15:39
  • \$\begingroup\$ @Nedd Yes, it definitely looks like a design flaw. Strange it still works as expected (MOSFET is off when SW1 is open), possibly current flows through some internal LM393 junctions. Anyway it's no good the battery is loaded with R7 when the device in off, thank you for the observation, I'll correct this. Probably better to implement FET totem-pole here, I just got some IRF7307 for testing. \$\endgroup\$
    – s0me0ne
    Feb 21, 2016 at 18:53

Add a large value capacitor right at the +Load point to ground. (At those currents maybe use at least 1000uf). This will give extra surge reduction to the supply rail. You do show large caps at the battery connection point, but if physically at that location they may not help as much. Also adding a moderate size ceramic capacitor at the same point will reduce higher frequency noise glitches. Be sure to have bypass caps located close to the comparator supply pins too.

The 1uh inductor is also much too small in value to filter noise at low frequencies. If the other options don't solve the problem consider going to 100uh or more, if practical. You should also consider moving the pi filter ahead of the switch, as in the present arrangement a larger inductor will have the LDO input voltage rising a bit slow, (just be sure to keep an extra cap right at the regulator input pin.)

Your not showing where the comparator and voltage reference are supplied from, though per your description I assume it is the LDO output.

  • \$\begingroup\$ Do you recommend some specific type of capacitor for +load decoupling? Bulk capacitors in the schematic are solid tantalum ones and they are right after the battery connector. \$\endgroup\$
    – s0me0ne
    Feb 21, 2016 at 15:21
  • \$\begingroup\$ Using a 1000uf or larger electrolytic cap at that point plus one of the tantalum parts should help. Large value tantalum types would not normally be used for this since they are often quite costly. If not a tantalum in parallel then a ceramic cap (of 1uf or more) could be used in parallel with the electrolytic. With that arrangement both low and high frequency noise from the switching should be greatly reduced. \$\endgroup\$
    – Nedd
    Feb 21, 2016 at 16:02

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