As a beginner in electronics, I would appreciate very much to get some input from you folks for my project, so I can decide in what direction to point my nose :)
What would I like to do?
I would like to superimpose a 1PPS signal coming from a GPS disciplined oscillator over the ADC, Q signal of an RTL2832U software defined radio chip.
This way I can very accurately timestamp received signals, for use in a TDOA application.
Of course, this 1pps signal, would "corrupt" my sampled radio waves, and hence I would like to keep this signal as short as possible.
Because most receiver dongles on the market (like: http://www.rtl-sdr.com/buy-rtl-sdr-dvb-t-dongles/ ) all have very small surface mounted designs, a modification must also remain "practical" to do.
Fortunately, most receivers have breakout pins for the Q- and Q+ inputs of the RTL2832U IC.
I was hoping to come up with a modification that uses a RFSwitch IC to short these Q- and Q+ pins using a 50ohms resistor, and hopefully that creates a periodic recognizable pattern on these 8-bit Q samples.
Assuming that this works ( please, let me know what you think ) I would really like to hear what kind of methods and/or components, you would advice me to use to come up with a circuit that could limit the 1pps signal ( which length differs on the many different GPSDO devices ) to 10us.
I hope it can be done using a combination of passive components and 1 or 2 transistors. Having said that, there is also a 28.8mhz clock signal available.
Looking forward to hear your input.