# I want to implement a math equation in FPGA, should I describe a CPU or can I do it just by code?

For a school project I'm trying to implement an equation for example like this: (EDIT)

B = ((A + 2) * |A - 10|) / (c * c)


everything is unsigned binary values, absolute values always. The equation should be evaluated 57600 times per second for an image of 240x240 pixels.

I don't know how to start it. Would I be better to implement it by making a MIPS processor and load a list of instructions of the program in assembly and so?

Or should I do a direct approach by code? If so, what methodology should I follow, should I do FSM? Should I use clocks?

I tried to program it by easy combinational (assign... etc) and it works, but it uses almost 80% of available ALMs. I don't think this is the best way, I'm looking to make it the less hardware usage possible, time is not a constraint. I'm using Quartus II and Verilog.

• Do the math, discard the functions you don't need to implement, the rest should be easy. Feb 27, 2016 at 14:21
• |A-10| implies an intermediate signed value, so be careful saying everything is unsigned. Might bite you in a future implementation. Feb 27, 2016 at 14:23
• Depending on the size of the variables, a (partial) lookup table may be viable. Dividing is probably very expensive, multiplying somewhat expensive. Carefully think about what n / c * c actually does. Feb 27, 2016 at 14:36
• The key question here is: How frequently do you need to evaluate this equation? Once a second? Millions of times per second? Billions of times per second? The answer will indicate what kind of resources you need to devote to the problem. Feb 27, 2016 at 14:48
• @Dave thanks for pointing out, It should evaluate 57.600 unsigned numbers in total per second. Reason is because every number represent the intensity of each pixel in a black and white 240x240 picture. XP Feb 27, 2016 at 14:53