I am trying to implement TDC on Altera FPGA so i need to make carry chain with carefully placed delay elements. I was searching and found a lot of examples for XLINX where manually placing of elements is done with attributes which are given to wanted element. One of the examples is below:
ATTRIBUTE LOC OF delayblock : LABEL IS "X_SLICE"&INTEGER'image(Xoff)&"Y"&INTEGER'image(Yoff+i);
Quartus ii compiler can't recognize such statment. On other hand i didn't found any examples for Quartus.