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I've been stuck on this design problem for a while and I am just filled with a lot of equations and unknowns and not getting anywhere with it. Here's a picture of the problem with the problem statement below

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(1) Constant Current Region : id = k/2 (Vgs - Vt)^2

(2) via KVL: Vgs = 1 V - idRs

(3) via KCL: 1 V - idRd - idRs -Vds + 1V = 0

(4) Rd = (1v - Vd)/id

(5) Rs = (Vs - (-1 V))/id

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    \$\begingroup\$ The key to the solution is to avoid getting drowned in all the formulas. So let's forget about the formulas for a moment and just see what we're trying to achieve. Vds must be 1 V. Since there's 2 volts between "top" and "bottom" this means there needs to be 2V - 1 V = 1 V across (Rd + Rs). The current through Rd and Rs is Id. Vgs will be at least Vt but then no Id can flow, so Vgs must be a little bit larger than Vt. Start with Vgs = 0.6 V, what should Id be ? (use formula 1). When you know Id you can calculate Rs. Since V (Rd + Rs) = 1V you can now calculate Rd. \$\endgroup\$ – Bimpelrekkie Mar 1 '16 at 8:38
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    \$\begingroup\$ That Vgs = 0.6 V is just an assumption I made to get a solution. You could also use Vgs = 0.7 V and get a different solution but still with Vds = 1 V. There is no single solution, there are many ! \$\endgroup\$ – Bimpelrekkie Mar 1 '16 at 9:03
  • \$\begingroup\$ So if vgs = 0.6 v then id = 1mA/v^2 * (0.1v )^2 = 0.01 mA,,,, 0.6 V = 1v - (0.01 mA)(Rs) ,,,,,0.4v/(0.01mA) =Rs 40 kOhm ,,,,,1V/(rd+rs) = id ,,,,,,,,1v = (0.01mA)(40kOhm + rd),,,,,, 1v - 0.4 v = 0.01 mA * rd ,,,,,,,,rd = 0.6V/0.01 mA,,,,,, rd = 60 kOhm? \$\endgroup\$ – Sam Mar 1 '16 at 9:05
  • \$\begingroup\$ So basically in the context of the question, I am allowed to choose what my Vgs value is? And for constant current region Vgs has to be between 0.5 < Vgs < 1.5 V \$\endgroup\$ – Sam Mar 1 '16 at 9:07
  • \$\begingroup\$ If the solution satisfies the request then yes, you can choose the Vgs (or Id). Constant current region, you mean saturation mode. That is more determined by Vds. When Vds is high enough, you're in sat. mode. Vd can go down to one Vt below Vg to still be in saturation. Here Vg = 0V so Vd can be -0.5 V and the MOS would still be in saturation. Here Vd is at a higher voltage so the MOS is in saturation. \$\endgroup\$ – Bimpelrekkie Mar 1 '16 at 9:16

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