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I am trying to run a transient simulation of a step down dc-dc converter using ideal components. This includes a feedback loop consisting of an error amplifier. I am interested in transient response without including any compensation.

I have used a voltage controlled voltage source without any saturation limits for an error amplifier. If I use an ideal opamp, it would saturate even though there is a feedback loop. Why?

If I use an ideal comparator to compare the control voltage with a sawtooth signal of desired frequency fs (same as switching frequency), I would get a PWM output whose frequency will not be fs. Below is the schematic and corresponding transient simulation (Multisim):

enter image description here

enter image description here

Since there is not saturation limit set for voltage-controlled-voltage source, I can have arbitrarily large gain to reduce the error. But the ideal comparator will compare the control voltage with sawtooth signal even if the control voltage is very high initially(that is why I've not included it in plot above). But the output is a PWM signal with a different frequency.

So I tried using a PWM control block instead of a comparator.

enter image description here

But the problem is that unlike an ideal comprator this block will not output a PWM signal with such high values of control voltage. In order to achieve this I have to set the amplitude of sawtooth reference used by PWM block to very high values so that Vcontrol and sawtooth signal intersect each other.

But the result is a pefrect PWM signal with frequency same as fs.

enter image description here

I wanted to analyze the effects of changing amplitude of sawtooth signal, gain of VCVS on transient response. But for obtaining a proper output I have to simulate using impractical values. Is there any other way to obtain a proper PWM signal using an ideal comparator?

EDIT:

Input voltage = 12V

Required Output = 6V

Steady state duty cycle is 50%

Switching frequency fs = 1Mhz

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  • \$\begingroup\$ The problem is the cycle by cycle ripple voltage is completely in the control loop. Increase the output filter capacitor C1 by a lot, or add a low pass filter to the feedback path. \$\endgroup\$
    – rioraxe
    Mar 2 '16 at 23:49
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If I use an ideal opamp, it would saturate even though there is a feedback loop. Why?

Isn't this just a result of the fact that the output voltage = \$V(in)*Gain\$

You can check this by increasing the gain by a factor 2 and checking if the (what you think is the) saturation voltage also increases by a factor 2.

I would get a PWM output whose frequency will not be fs.

I think you should get a PWM signal with frequency Fs. Have a look at a datasheet of any switched converter. There is a sawtooth or triangle generator which sets the switching frequency Fs.

I think you also have to pay a bit more attention to the expected default values of the voltages in your loop. Like: what DutyCycle do you expect when the converter is working and what will then be the PWM control voltage ?

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  • \$\begingroup\$ "Isn't this just a result of the fact that the output voltage = V(in)∗Gain" Yes, the opamp should saturate if there is no feedback. But since there is negative feedback, the equation would be A/(1+Ab) \$\endgroup\$
    – JGalt
    Mar 2 '16 at 16:07
  • \$\begingroup\$ I am not getting PWM signal of same frequency. This I think is because the switch should be On/Off at the same time when sawtooth signal starts/ends transition from its maximum voltage to minimum voltage. This is achieved by PWM block that I've used. \$\endgroup\$
    – JGalt
    Mar 2 '16 at 16:09

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