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Please excuse any mistakes or blatant errors, I am a beginner. This circuit is meant to have the op-amp function as a comparator, and produce peaks on the output that I want read by a microcontroller. The issue is after simulating this "Data Slicer" op-amp circuit multiple times, I noticed that eventually, the two inputs are approaching the same voltage. This is causing quite a bit of unwanted chattering on the outputs. I believe this circuit has an RC network with a time constant of 0.1 s.

How can I fix this, so that the output is consistent with the change provided by the photo-transistor, and get rid of that chattering? Thanks

Design

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  • \$\begingroup\$ It's not recommended to use an op amp as a comparator. \$\endgroup\$ – Null Mar 2 '16 at 18:46
  • \$\begingroup\$ You might try a tiny bit of positive feedback to produce some hysteresis and/or a pull-up/pull-down on the non-inverting input. \$\endgroup\$ – brhans Mar 2 '16 at 18:49
  • \$\begingroup\$ yeah, reading the answer @Null commented, Hysteresis seems to be able to fix such issue. I'll add the feedback and simulate it \$\endgroup\$ – Mena Labib Mar 2 '16 at 18:50
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    \$\begingroup\$ First describe what you actually want to fix! It's pretty clear what this circuit will do, and yes "chatter on the outputs" describes it nicely. But until it is clear what you want it to do, there is nothing to fix! \$\endgroup\$ – Brian Drummond Mar 2 '16 at 18:56
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    \$\begingroup\$ Hysteresis (positive feedback) will not work well with this circuit, since the effect of the feedback is low-pass filtered by C2. \$\endgroup\$ – WhatRoughBeast Mar 2 '16 at 19:10
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The design of the circuit is such that the non-inverting input lags behind the inverting input due to the delay charging and discharging C2. This allows the circuit to compensate for changes in background IR levels, but if, for example, the '-' input were to rise suddenly the '+' input will lag behind while rising with the typical RC time constant and the output will switch low during this time because '-' input is greater than '+'.

The time constant of the delay is given by \$ \tau = R \cdot C = 100k \cdot 1\mu = 0.1 s \$. In \$1\tau\$ it will have caught up by 63%, in \$ 3\tau\$ by 95% and in \$5\tau\$ by 99% of the change.

After the '+' input catches up the op-amp output depends on the offset voltage of the op-amp and it will be very susceptible to noise on the inputs and may, as you discovered, fluctuate between high and low.

To fix this you need to decide what output you want when the circuit is stable.

schematic

simulate this circuit – Schematic created using CircuitLab

Figure 1. Pull-up or pull-down resistors.

  • By closing SW1 and gently biasing the '+' input slightly high OUT will normally be high. Only when Vin increases suddenly (above the '+' input) will the output switch low. After several time-constants the output will turn low again. No switching will occur when Vin decreases.
  • By closing SW2 instead the opposite action will occur. The output will be normally low and a sudden negative step in Vin will cause the output to go high for a time.

You haven't given any figures for variation in Vin when the photo-diode is switched so I've guessed at 4.7M bias. Note that the strength of the bias depends on the Vin voltage. e.g., If Vin is normally around only 1/5 of supply then then R3 will have much greater 'pull' than R2 would. You'll have to experiment.

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  • \$\begingroup\$ This is perfect! I will run some tests! Thanks so much! \$\endgroup\$ – Mena Labib Mar 2 '16 at 19:43
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No current flows into the (+) terminal of the op-amp, so the voltage across the capacitor will necessarily approach the voltage at the (-) terminal. You could add a resistor in series with the capacitor to pull it to ground, but I'm still not entirely clear on how you are expecting the circuit to behave.

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  • \$\begingroup\$ I'm assuming you intended to say "I'm still NOT entirely clear..."? \$\endgroup\$ – Asmyldof Mar 2 '16 at 19:37

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