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I have read that transistors (especially in common emitter mode) have an effect called "early effect" in which increasing the collector to emitter voltage (Vce) increases the collector current and doesn't let it saturate. Now, the reason that is given for the explanation of this effect is that increasing the collector to emitter voltage effectively reduces the base width by increasing the depletion width of collector base junction. This in turn improves the emitter injection efficiency and leads to higher emitter current thereby increasing the collector current.

My question is why is the same effect not seen in the case of a common base configuration when we increase the collector to base voltage? There also the emitter current increases with increase in C-B voltage. The increase in Ie should result in an increase in Ic therefore. Still, how does the collector current saturate at a particular value (before the punchthrough region)? How does it make sense to draw a curve of Ic vs Vcb for different Ie (output characteristic) when Ie itself varies with respect to Vcb? Or another question would be why is the early effect more prominent in common emitter mode as compared to the common base?

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    \$\begingroup\$ A note, the "Early effect" is name for Jim Early, not just because it happens early. His original paper has a nice write up for the decrease in width. \$\endgroup\$ – b degnan Mar 9 '16 at 11:30
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    \$\begingroup\$ Ahh, the late Mr. Early. James M. Early (July 25, 1922 – January 12, 2004. \$\endgroup\$ – Transistor Oct 4 '17 at 16:28
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This is simply not true, the Early effect is present in the common-base configuration as well.

A good example is the cascode configuration, where the cascode transistor is in a CB configuration. Rout depends on the early effect, however it is reduced because of negative feedback. Additional current through a cascode stage decreases Vbe of the cascode transistor, which reduces the impact of the Early effect.

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  • \$\begingroup\$ Thanks for correcting me Mario. I suspected that would be the case but could not find any resource on that. However, could you please explain the reason why is it prominent in common emitter circuit? Generally the output characteristic of common base is flatter than common emitter. \$\endgroup\$ – Gyananshu Upadhyay Mar 9 '16 at 10:00
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Firstly, it's got little to do with saturation of the BJT: -

enter image description here

Saturation is that small region shown in the above diagram when VCE is quite small. Maybe you are thinking of a FET: -

enter image description here

In a FET the saturation region is the area on the graph where the current is largely flat with changes in drain-source voltage. Yes it's confusing to have two devices with similar characteristics but with the same name describing different regions.

My question is why is the same effect not seen in the case of a common base configuration when we increase the collector to base voltage?

The early effect is not restricted to transistor topology. It is present in CE, CB and CC.

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I think it is due to leakage current in common emitter configuration which is very large in comparison to leakage current in common base configuration.

\$ I_{cbo}= (B +1) I_{cbo} \$

Hence when we increase \$V_ce\$ , there's is increase in \$ I_{cbo} \$ which is already larger than \$ I_{cbo} \$.

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You should note the variation of beta with the increase of collector current..the change in beta is quite drastic with change in collector current..but the same drastic change is not seen in alpha due to its relation with beta.so i think CE exeriences greater EARLY effect.

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