How might a comparator with only logic gates look like? Isit like:
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Your answer looks fine as is (assuming an XOR is counted as a logic gate (and I can't see why not).
You can reduce gate count by one by using an 8 input NAND or AND at the output. eg 74xx30 8 input NAND.
If your XOR gates were open collector you could connect all their outputs, add one resistor and remove the AND gates. Depends wheher your rules allow a resistor pullup with an open collector gate.