# Resistor values to produce 8 voltage windows into analog pin

I have 8 Arduino Nanos (at 5V) plugged into a PCB and I would like each to have an ID so that each Nano can choose an I2C address without any clashes, without having to program each differently first, and using only one analog pin. Then, if I swap any of the Nanos around, they will pick up an address based on the resistor value of their location.

For this I think I only need each Nano to see the output of a voltage divider for this purpose, but the threads I've read don't recommend resistor values to use, so I'm not sure what will give accurate readings while limiting current leakage. Can anyone recommend some values to use?

The readings don't need to happen quickly if that allows higher resistor values to be used.

thanks, Danny

• All resistor values will have to be selected based on the maximum allowed source impedance for accurate measurement, as required by your nanos' analog pins. Can you find that value & edit it into your question for us? – Robherc KV5ROB Mar 10 '16 at 14:28
• Thanks everyone - the replies are awesome. I've gone with the resistor values posted by Spehro Pefhany, and I'll update once I've tested it. D – dannydc Mar 14 '16 at 13:06

Here is an example of Marla's solution with a simple spreadsheet to show the input source impedance Rsrc as seen by the ADC using 4.7K series resistors. I would suggest not doing that though- using 1% resistors, the worst case error at the input is only about +/-5 counts, so there is lots of margin. But if each supply voltage (and therefore ADC reference) varies by a few percent, the margin will be reduced significantly.

It would be better to use a divider for each Ardino from each individual supply so that the ratiometric measurement would cancel out differences in the regulated supply voltage.

Suitable values might be as follows:

The resistors are standard E98 values except for 66.03 which is made from 95.3K || 215K, so a total of 7 different resistor values would be required (including 10.0K), and a total of 14 resistors).

If you can use the same reference on each Arduino and feed the divider from the reference, then a simple divider can be used without fear. I'll leave that to those more familiar with the particular Arduino- but I think the underlying AVR chip supports using an external reference.

• Indeed the arduino nano does allow using external reference (AREF) on pin 13. That is "header J2" pin 13 – Marla Mar 10 '16 at 16:56

You can use 5 volts as one voltage, then use GND (0 volts) for another (assuming the 5 volt power supply is regulated).

Then you only need 6 more voltages equally spaced. simulate this circuit – Schematic created using CircuitLab

The Output volts is calculated by : $Vi*R2/(R2+R1)$
Where Vi is the Regulated 5 v.

You can even use the circuit simulator to measure the Output volts.

Change R2 to obtain other values.

I selected R1 as 100K. You could use a R1 of even 1 Meg ohms to reduce current consumed.

I added capacitor C1 so that your Analog to Digital converter won't drag down the Output volts. The capacitor holds the voltage constant while the ADC does it's sample and hold. (EDIT 2 : C1 changed from 10nf to 100nf)

EDIT 1 : added note on sample and hold, per comment by RobbhercKV5ROB

Taken from Data sheet for the processor :

The ADC contains a Sample and Hold circuit which ensures that the input voltage to the ADC is held at a constant level during conversion.

EDIT 2 : I have changed the capacitor C2 from 10nf to 100nf to account for the following from the ADC specifications :

The ADC is optimized for analog signals with an output impedance of approximately 10 k or less. If such a source is used, the sampling time will be negligible. If a source with higher impedance is used, the sampling time will depend on how long time the source needs to charge the S/H capacitor, with can vary widely. The user is recommended to only use low impedance sources with slowly varying signals, since this minimizes the required charge transfer to the S/H capacitor.

• Would the ADC in a nano be able to resolve voltages with a source impedance in the 100K, or even MegOhm range? I guessed they'd probably be closer to the 12Kohm source impedance demand I've seen on several uC ADCs. – Robherc KV5ROB Mar 10 '16 at 14:33
• For the short duration of sampling, the capacitor acts as low impedance source. But I should look into Nano ADC to to confirm @RobhercKV5ROB – Marla Mar 10 '16 at 14:35
• In response to edits: That 10K is what I was concerned about, and your solution looks elegant in its simplicity. Only thing I'd consider changing now would be to series in another 7 10K resistors (with parallel caps) so all 8 nanos could be connected to the same voltage-divider network. The pro there I think would be achieving very low current use, with the con of having to ensure using large enough caps to avoid each nano's sample-and-hold circuit adversely affecting the voltage seen by others in-circuit. - What are your thoughts there? – Robherc KV5ROB Mar 10 '16 at 15:26
• @RobhercKV5ROB - good idea on energy saving. As it turns out, the ADC has 100M input impedance, resistance is 100K with 14pf capacitor when sampling. Resistor tolerance might add up using multiple resistors. Post your thoughts as an answer. Nice for OP's to have multiple choices. – Marla Mar 10 '16 at 15:30
• @Marla While the datasheet states that the "Analog Input Resistance" is 100MΩ, that is likely the input impedance of the S&H circuit alone and does not take into account leakage in the input pin structure and the ADC input mux. Therefore, a much lower impedance source is necessary. – uint128_t Mar 10 '16 at 15:37

If you use a multi-tapped voltage divider, then by choosing the tolerances of the supply and the resistors tight enough and making the resistances of the resistors low enough that the ADC load becomes negligible, you can generate output voltages of arbitrary prcision.

An example is: If you chose to use 1% resistors, then worst case low resistance would be 99% of the sum of the resistances, and worst case high would be 101% of the sum off the resistances.

As far as loading goes, I think worst case is with the ADC (or its S&H) on tap V4 or V5, but don't take my word on that; work it out for yourself. :)

Once you've got all that done, all you'll need to do to implement your addressing scheme is to determine the width of the detection window (centered on the tap voltages) you want, and have your software determine where the Nano is, based on its falling between those limits.

• Error: If all of the resistors are 1% low or they're all 1% high, then the voltages on the taps won't change at all as long as the +5V doesn't move. – EM Fields Mar 10 '16 at 18:16

I envision a voltage-divider bus, something like this: • If you set all of your Nanos' (shown highly simplified, for schematic clarity) analog pins (the ones attached to this bus) to sample as infrequently as reasonable for your application (I'm guessing 10Hz, if supported, should be adequate), then the capacitors in this bus should be able to sufficiently buffer your inputs' sample-and hold demand spikes.

• The lower the tolerance (+/-1% should work well) on your resistors, the more accurately your ADCs can define their bus position ('ideal' values in this circuit would be +5V, +4.375V, +3.75V, +3.125V, +2.5V, +1.825V, +1.25V & +0.625V at each of the 8 outputs).

• Experimentation can tell you the highest resistance value you can use for your resistors, while allowing your ADCs to still accurately resolve their in-bus position with your specific components & software configuration(s).