It can absolutely damage hardware.
Say your IR shift gets corrupted to a MCU or FPGA and you accidentally load EXTEST or enter an IEEE 1532 ISC instruction, and you have not set safe values in the BSR cells. Every BSR pin on that device will immediately assert whatever state happens to be in those cells.
If you have some devices running power electronics for example, and there's no external protection, you could fire both MOSFETs in a switching controller and short voltage right to GND. I've seen this happen multiple times. EXTEST is probably the riskiest instruction that is defined in the specification.
If you can't trust your JTAG setup, I'd stop and fix the problem before proceeding. Even outside of hardware damage, think about all the engineering time you'll waste chasing Heisenbugs that turned out to be a bit flipping every now and then in a DR shift.
Basically, look at your design and consider what happens if every pin on a JTAG device jumps to an unknown state (or all 0s or all 1s) -- chances are you will not be happy with the result.
Other things I've done in the past due to bad JTAG integrity is accidental triggering of security fuses and similar. This would brick the part and require replacing it. By design, JTAG has no integrity checking or error correction -- it's one of the simplest possible busses by design.