I am a little confused as to how this circuit works:

According to this website its function is to speedup charge time of the MOSFET as well as reduce losses. How does D1 and Q2 actually work to make this happen? If it's just to prevent the MOSFET from discharging, wouldn't only having D1 work?



If you look at the full schematic, it is easily apparent why. The MC34063 is configured in the circuit in such a way that it drives the MOSFET gate with an open emitter output: The chip can drive the gate high by turning on the NPN transistor between the pins 1 (switch collector) and 2 (switch emitter), but the chip itself has no way of pulling the gate low.

Without the external transistor the only thing discharging the charge stored in the gate capacitance would be the 470 ohm resistor from the gate to ground. This is a slow process, since the resistor can only pass a few tens of milliamps. Selecting a lower resistance would decrease the switch-off time, but the resistor would also conduct more current when the gate is being driven high, wasting energy and heating up in the process.

The extra transistor Q2 solves this by pulling the gate down immediately after the MC34063 ceases to pull the gate high: When the transistor inside the chip switches off, the resistor pulls the base of Q2 low. Since Q2 is a PNP transistor, it starts to conduct when current is pulled from its base, quickly discharging the MOSFET gate charge to ground. When the chip then turns its output transistor back on, both the collector and base of Q2 are pulled high, preventing base current flow and keeping it switched off.

The diode D2 blocks the flow of current from the MOSFET gate to the base of Q2, allowing the Q2 base voltage to fall below the Q2 emitter voltage. Without D2 Q2 would be unable to turn on.

  • 1
    \$\begingroup\$ Diode D2 has another function as well. When the IC chip output starts to turn on the MOSFET by pulling high any current attempted to be drawn through the diode places a reverse bias across the PNP base-emitter junction forcing the transistor into a hard OFF condition. \$\endgroup\$ – Michael Karas Mar 15 '16 at 6:24

This circuit is to make the FT turn off faster than it turns on.

FETs tend to have a relatively large requirement for charge into/out of the gate for switching. Although they can stay on with no current, to switch them quickly, they need a large current during the transition.

This circuit turns the FET on with whatever current the driver IC can source, flowing through diode D1.

However, it turns it off with a transistor used as an emitter follower, which can be a much larger current. If it only had to turn off quickly, then a resistor in the place of D1 would be OK. However, it needs to turn on fairly quickly, D1 allows a large forward current to flow, and still allows the driver to bias the transistor correctly to turn the FET off.

Losses may well be reduced if two series FETs use this circuit. There is a problem called 'shoot through', which happens when two series FETs are switched at the same time. If one turns on before the other has turned off, they are both on together briefly, and a large current can shoot through. This modification to the driver ensures that the off-going FET switches faster than the on-going FET, avoiding shoot through.


Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.