I have looked around on SE but couldn t find anything that worked properly for me.
I am looking for a way to convert a 4 bit signal_vector to an integer. However I do calculations on signals as well. This means I need the library called
This is (the condensed version of) what I have so far:
library IEEE; use IEEE.std_logic_1164.all; use IEEE.std_logic_arith.all; USE ieee.numeric_std.ALL; use IEEE.std_logic_unsigned.all; signal counter: std_logic_vector(3 downto 0); counter<=counter + "0001"; ... if ((to_integer(counter)) < (to_integer("0100"))) then -- do something end if;
this gives me the following error: Identifier "unsigned" is not directly visible.
signal counter : natural range 0 to 15;then
counter <= counter + 1; if counter < 4etc. In other words, say what you mean instead of making things more complicated. \$\endgroup\$