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I'm having some difficulty understanding the solution to this question.

Compute the cable-to-cable crosstalk due to capacitive coupling in a harness between two cable pairs having an average separation distance of 3 mm and a 10 m in a cable tray. The cable diameters are 1 mm and both cables are operating at a 100 ohm impedance level. Assume h = 5 mm, source logic = 3.5 V with rise/fall times of 500 ns.

The lecturer showed the following diagram when he was talking about the capacitative coupling, and the equivalent (part of) circuit representation.

enter image description here

The Capacitive Cross-talk Coupling (CCC) is defined as

CCC(dB) = 20 log (\$V_V/V_C\$)

where \$V_C\$ is the culprit source line voltage and \$V_V\$ is the victim load line voltage.

The solution given is as follows.

The second corner frequency, \$f_c\$, in the spectrum of a pulse (or pulses) corresponding to rise/fall time of 500 ns is: \$f_c = 1/πτ\$ = 637 kHz

\$C_{CV}\$ = 12 pF/m (read from a graph), and \$[ωC_{CV}l]^{-1} = > \text{2 k}Ω\$, thus CCC dB = -26.4 dB

Source logic = 3.5 V = 11 dBV, then

Noise = 11 dB – 26.4 dB = -15.4 dBV = 0.17 V < 0.4 V

Thus, switching OK.

I have several questions.

1) I don't know how to get CCC dB = -26.4 dB. I know I can use the voltage divider on the circuit representation to find \$V_v/V_c\$, which means I need to find \$Z_v\$. But to do that, I need to find \$C_v\$, which is the capacitance per unit length of the victim wire, and I don't know how to get this value.

2) What is "source logic"?

3) Why does noise < 0.4V imply "switching OK", and why "0.4V"?

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Source logic most likely means that your source is some digital logic circuit, (some microcontroller or something) which has standard CMOS voltage level of 3.3V. Explained here. As you cans see, logical "zero" is represented with any voltage from 0 to 0.8V and there is no danger that your coupled noise (0.4V) induces something that may be considered as logical "one" (which is represented with voltage higher than 2V).

Regarding your -26.4 dB question: look at this: Cv is same as Ccv as the lengths and the medium are the same. Input impedance is 100 Ohm, way smaller than any impedance 1/(omega Cv)=2kOhm . Practically, 100 Ohm in parallel with 1/(omega Cv) will be 100 Ohm. So, if you calculate your voltage divider 100/(2000 + 100) = 0.047 = -26.4 dB!

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  • \$\begingroup\$ Ok, so because \$Z_{V1}, C_V and Z_{V2}\$ are in parallel, the potential difference at each branch across them is the same at \$V_V\$, right? That's why the voltage divider is as you stated, 100/(2000+100), i.e. take \$Z_{V1}/([jwC_{CV}]^{-1} + Z_{V1})\$. But my question is, doesn't this value change if instead of taking \$Z_{V1}\$, I take \$[jwC_{V}]^{-1}\$ instead, which then gives 2000/(2000+2000) = 0.5? \$\endgroup\$ – Rayne Mar 17 '16 at 5:52
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    \$\begingroup\$ That's why I thought we needed to consider \$Z_V\$, the combined resistance, for the voltage divider? I thought in parallel, we have \$Z_V = [1/100 + 2000 + 1/100]^{-1} = 0.0005\$, then voltage divider is \$Z_V / (Z_V + [jwC_{CV}]^{-1}) = 2.5 \times 10^{-7}\$? Where did I go wrong in my calculations? \$\endgroup\$ – Rayne Mar 17 '16 at 5:53
  • \$\begingroup\$ @RokerRivic Can you explain why you've used the voltage divider 100/(2000+100)? Thank you. \$\endgroup\$ – Rayne Mar 19 '16 at 5:03

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