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I am trying to find power consumption of my vhdl code.I am going to use the power estimator in xilinx 9.2.Do the power analysis results vary in xilinx 9.2 and xilinx 14.7??

Also will xilinx provide accurate power analysis results ??

Is there any other tool to find acccurate power consumption of vhdl code??

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    \$\begingroup\$ Uhm, VHDL code by itself can never use any power because it's just that: code. How can code use power ? Sure I know you have to synthesize a netlist, put that on an FPGA, run it at a certain clock and then it will consume power. But still, VHDL does not use power. \$\endgroup\$ – Bimpelrekkie Mar 22 '16 at 14:16
  • \$\begingroup\$ thanks.I'm trying to implement the code in spartan 3E using xilinx 9.2i and find the power.Do the power results vary in xilinx9.2 and 14.7 r should i use synopsis for accurate power estimation \$\endgroup\$ – Rocker Mar 22 '16 at 14:38
  • \$\begingroup\$ i cant understand u.Can u be a little more specific pls?? \$\endgroup\$ – Rocker Mar 22 '16 at 14:42
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    \$\begingroup\$ The real power consumption of a circuit depends a lot on operating conditions like temperature and average FF switching rate, rather than on the tool (version) you use to estimate it. ISE 9.2 and ISE 14.7 will both give estimates (probably slightly different ones), but none of the two will give an accurate power analysis. But it will be as close as you can get. I doubt that Synopsis is able to give better results. Xilinx as the manufacturer of your FPGA has all the detailed knowledge which is required to make a good estimate of the power consumption. \$\endgroup\$ – andrsmllr Mar 22 '16 at 17:58
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    \$\begingroup\$ In extension to @damage 's answer: Power analysis tools depend on a 'typical workload'. So the power estimator needs a testbench and/or a switching characteristics model. One way is to write a simulation, covering a typical workload and export that simulation as a waveform file (e.g. in vcd format). That file is used to calculate the switching probabilities. This can be used in combination with the known netlist to calculate wire + gate (un)chargings. And this in turn can be transformed into needed power or thermal discharge.... \$\endgroup\$ – Paebbels Mar 23 '16 at 13:03
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Normaly there are some spreadsheets supplied by your FPGA maker to estimate the power compsuption based on clock speed and resource usage. I never managed to get them to work thought :)

i suggest you get your VHDL code synthetised , and then make it run in a dev board (same FPGA model & speedgrade), then measure the consumption of your "code".

this will give you an estimate, remember , always apply a tolerance factor to your results.

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