Better way to divide voltage for input to an ADC DAQ?

I would like to monitor relatively higher voltages (up to 160V) using an ADC type DAQ. Most DAQs that I come across can handle around 5-10V of analog input, requiring the voltage to be divided. Here is one I like https://labjack.com/products/t7 . I was planning on running a simple voltage divider to an op-amp buffer (voltage follower) and finally into the input of the DAQ.

My thought is to use something like 3.3 MOhm (R1) and 105 kOhm (R2) to divide the 160V by ~32 (~5V). Then run that output to an op-amp voltage follower and finally into the input of the DAQ. I'm not sure how to size the resistors since the op-amp buffer should be high impedance and limit the current draw. I sized them so big to ensure I'm not drawing much current. Since I am monitoring the voltage, I do not want to load down the source. I want to know if this is a good way to do it, and if there are any better ways.

Yes, an op-amp unity-gain buffer is a reasonable approach in the ADC does not have a high-impedance input.

The minimum value of the sum of the two resistors is determined by how much current you can draw from the source without unduly affecting the accuracy. The power dissipation might also come into play if the resistors are low value.

The maximum value of the two resistors paralleled is determined partly by how much error you can tolerate due to op-amp bias current and/or leakage. Also practical considerations (resistors of lower value tend to be more stable, at least down to 1M or 100K). For example, metal foil resistors are not available much above 100K.

For relatively low accuracy applications, a few M ohms is fine, and the bias current error will depend on the op-amp you select.

If you follow their app note on the op-amp part (looks like there is an error in the plain divider calculation) they suggest an OPA344 - bias current should be less than 1nA at reasonable temperatures, which implies (for < 0.5LSB error on a 12-bit converter):

$R1||R2 < \frac{5.0}{2^{-9} \cdot 2^{13}} \approx$ 30K

Your 105K || 3.3M ~= 100K would have a bit more error at high temperatures, but still should be acceptable for most purposes.

• Thanks very much for the helpful answer. I'm not familiar with the parallel resistance to LSB error calculation you have provided. Is this suggesting that I want less than 30K parallel resistance to stay less than the noise threshold at 1nA? In that case, I could use something like 660 kOhm and 20 kOhm to give about 19k in parallel resistance. That would only make the source pull an extra ~235 uA which is nothing for my application. Mar 25 '16 at 21:44
• It's just the bias current multiplied by the source resistance gives the input-referred error. If you had 100K you'd have at 1nA bias current (that's the current flowing into the op-amp input) about 1.5 least significant bits of error, which is only 0.04%. Personally I'd try to use 1.0M for the high value resistor and adjust the low value resistor to get the ratio you need. Mar 25 '16 at 21:56