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I'm implementing a driver for the Intel 8259A PIC for x86. To do this properly, I am reading the Intel 8259A PIC Datasheet. It is halfway comprehensible even for someone who approaches controller chips exclusively from the software perspective like me but there is this diagram I don't get:

enter image description here

It is the 8-bit pointer sent from the controller to the CPU in response to the second #INTA (interrupt acknowledgement) raise.
IR is an abbreviation for "interrupt request," the D bits denote the data lines of the 8-bit data buffer of the controller.

What are these T3, T4, ..., T7? The datasheet does not mention them ever again, they are just there. I already wrote a driver for the Intel 8042 (guided by the IBM 5170 (PC AT) Technical Reference) and the T0 and T1 bits were called "test inputs" there (p. 1-44).

Is that related to the T bits from the description of the Intel 8042 controller? What other meaning could these names have?

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  • \$\begingroup\$ Those bits come from ICW2. See the bottom of Fig.7 on pg.11 \$\endgroup\$ – brhans Mar 28 '16 at 20:23
  • \$\begingroup\$ @brhans Oh, well-spotted, thanks! So the T bits are initialized with ICW2 and set according to that ICW in future vector bytes (the said 8-bit pointer). Is this possible? \$\endgroup\$ – cadaniluk Mar 28 '16 at 20:28
  • \$\begingroup\$ That IBM PC AT technical reference is a gem! Thanks for including the link. \$\endgroup\$ – Jet Blue Jun 22 '19 at 6:10
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The 8259A can work with 8080/85 processors, or 8088/86 processors. The mysterious T's only appear for the 8088/86 interface.

This means you have to go to the 8088/86 documentation for a clue as to what they mean.

These latter processors have a 256 entry interrupt 'table' (looking good, 'T' for table?) that the programmer must load with interrupt vectors. I notice that for 8088/86 the PIC transfers only one byte, not two, which squares with it only being a 256 entry table (one byte addressing).

If all the T's start as zero (which is probably/possibly the default power-on state?), then that gives you access to the first 8 interrupt locations in the interrupt table without further effort. Writing a different T field allows you to switch the interrupt target quickly.

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