With multiple slaves on one SPI bus, only one can communicate at a time. The master is responsible for choosing which chip that is, by manipulating the appropriate slave select line. If you have several slaves, and they may need to send messages to the master, you have several options:
- Poll the slaves. The master cycles through the slaves regularly, checking if they want to communicate.
- Use another wire. Some SPI chips can assert a separate connection which is not part of the SPI bus but is nonetheless connected to both the slave and the master. When the master sees this happen, it knows to contact that chip over the SPI bus. This is sometimes known as an interrupt, though it may or may not trigger an actual interrupt on the microcontroller.
There is no sense of priority beyond the basic idea that one slave is selected and all others are ignoring the bus. If you need to have a priority system, you can do that in software on the master, but it's not part of SPI.
An example of a chip I have been using recently is the AD7730. It's an ADC, and it regularly has new conversion results to pass to the master. One way to use this chip is to connect by SPI, and regularly read the status register. When one of the bits in the status register goes high, it means a new measurement is ready, and you can read it out (also over SPI). An alternate way of using it is to connect the RDY pin on the AD7730 to a GPIO pin on your master and when the measurement is ready that pin goes high. The master can then read the result over SPI.