1
\$\begingroup\$

and thanks for bothering with my problem.

I have a two signals A and B that I want to route using several alternative paths via jumpers on my board. In one of the occasions I need to use the same input pin of an IC. Rest assured, when signal A goes to the IC pin, signal B goes to a different place. Please see the image attached: trace layout The trace between the jumper pad and the IC pin is about 24 mm long. My question is, do I need some kind of termination for these traces in order to prevent reflections from the end that is not used at the moment?

The signals are about 3 V in amplitude, with rise/fall time about 0.7 ns, and are between 5 and 15 ns long.

Thanks,

ps. image annotation added

\$\endgroup\$
  • \$\begingroup\$ Did you consider simulating the setup with a HS simulator like Hyperlinx? \$\endgroup\$ – Claudio Avi Chami Apr 6 '16 at 17:47
  • \$\begingroup\$ @claudio-avi-chami, no. I do not have any simulators, can you recommend some free tools for that? \$\endgroup\$ – lazaraza Apr 6 '16 at 17:52
  • \$\begingroup\$ I think that you can download Hyperlynx for evaluation for free - mentor.com/pcb/product-eval/hyperlynx-si-virtual-lab \$\endgroup\$ – Claudio Avi Chami Apr 6 '16 at 17:56
  • \$\begingroup\$ 24 mm is just on the edge of the "1/10 of a rise-time" rule for ignoring distributed effects. Can you move U11 closer to your jumpers to reduce the length? Can you slow down the rise time? Can you accept some ring in the signal? Can you add some attenuation somewhere? \$\endgroup\$ – The Photon Apr 6 '16 at 18:06
  • \$\begingroup\$ Any chance you can annotate / mark-up that image with A/B callled out/drawn out? You are correct, you're gonna have to think about termination, but I think there is a more optimal way to layout what you have drawn. That dual trace going into Pin 1 will not work well though, I can tell that right now -- huge stub. \$\endgroup\$ – Krunal Desai Apr 6 '16 at 18:06
1
\$\begingroup\$

enter image description here

Forgive my bad drawing. So what's happening is that you have the opportunity for multiple reflection paths.

In your original setup, if CH_A is active, you have your signal going doing A, and when it gets to ABC node, you have a bit of your signal going to B, and then to C because your impedance halves at this point since you have Zo going to B and Zo going down C (assuming your traces are the same thickness - hard to tell). When each of those reaches the end, they reflect back and it goes all over the place because once you get back to ABC, your impedance changes. This is your ringing. Will this degrade your edge - probably not. A simulation would probably be your best bet.

but if you connect your trace like in D, then there is only one reflection path (which is good!).

so if you have a series termination for CH_A and CH_B, the signal will die out once it reaches the driver.

\$\endgroup\$
  • \$\begingroup\$ Thank you for your answer. Do I get it right, that the trace D in your drawing is connecting the IC pin directly the pad 2 on both the jumpers and without the star point as in my drawing? \$\endgroup\$ – lazaraza Apr 8 '16 at 11:45
  • \$\begingroup\$ @lazaraza yup. Trace D replaces the star/ABC connection you have. \$\endgroup\$ – efox29 Apr 8 '16 at 11:46
0
\$\begingroup\$

Any time you want to "guarantee" a particular circuit operation, you have to take "all" precautions possible. If your circuit is sensitive to EMI (external or its own), you have to: terminate inputs and outputs, decouple voltage pins, and shield the circuit. Your circuit may need one or all of these measures.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.