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The application is high-side current sensing for a battery-operated device. The current drawn from the battery goes through a shunt resistor, the voltage across the resistor is amplified by an INA, which output goes into an ADC (ADS1262). An MCU retrieves the conversion results and forwards them to a computer for analysis.

I tested the circuit by generating a current [0 A - 1.5 A] through the shunt resistor (0.01 A steps from 0 A to 0.1 A, then 0.1 A steps). According to the resistor's value and the amplification, this gives a voltage range [0 V - 4.3 V] at the ADC's input, which has a 5 V reference. I calibrated the ADC before the test (offset and gain respectively at min and max input current). For each current step, I recorded 100 conversion results from the ADC synchronized with as many samples from a tabletop DMM (Agilent 3606) for the ground truth. Then I computed the average error for each step. As shown below, the absolute error between the generated current and the measured one decreases linearly with increasing input. At 1.5 A input, the error is smallest (about 50 μA).

Error between the input current and the A-D conversion result, as a function of the input current

Why is the error larger for smaller inputs? I expect some ADC nonlinearity, but in the ppm range, not several percent. I checked that the ADC's input is indeed linear, so this behavior doesn't come from the amplification stage. Is it a general property of ADCs or is it specific to my circuit?

(This was part of a prior question, where I gave more details on the project. I don't think the details are relevant here, though. This other question shows an error curve very similar to mine, but they used a MOSFET for the current sensing and its characteristic was nonlinear to begin with. So it doesn't help me much.)

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  • \$\begingroup\$ Are you averaging the results? (i.e. taking multiple measurements at a single point)? \$\endgroup\$ – Peter Smith Apr 7 '16 at 8:10
  • \$\begingroup\$ @PeterSmith Yes, I took 100 samples at each point. I edited the question to include that. \$\endgroup\$ – Kasdonchu Apr 7 '16 at 8:20
  • \$\begingroup\$ If you calibrated the ADC for offset and gain at the extremes, then what graph shape were you expecting??? I see nothing wrong with the graph and, if you extended it to 0mA then the error should fall to zero by your own actions of pre-calibrating. The fact that it doesn't look like it will be zero (at 0mA) maybe because you didn't calibrate correctly. \$\endgroup\$ – Andy aka Apr 7 '16 at 8:21
  • \$\begingroup\$ @Andyaka I took ten more measurement steps in the range [0 A - 0.09 A] (see edited picture), so yeah, you're right. Then, the shape of the curve just shows that between the two calibration points, the conversion isn't linear? Is that right? And how does the ADC's own nonlinearity (a few ppm) account for such large errors? Sorry if that's really basic, I don't have much experience with ADCs. \$\endgroup\$ – Kasdonchu Apr 7 '16 at 9:50
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You will be very lucky if you can use the bottom 50 mV of an ADC as a calibration point. I usually avoid the bottom and top 50 mV of the quoted range because of gain slope and zero offset problems.

It does indeed look like you are calibrating with 0 volts fed into the input but you will probably get the same "zero" digital output value with maybe +20 mV fed into the input.

I would calibrate at just below maximum and just above minimum to ensure lowest error for the major part of the range.

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For zero load, can the INA generate 0 V out ? With offsets, it might need to generate a negative voltage which it can't unless you have a negative supply.

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  • \$\begingroup\$ For the moment it's an INA with dual supply. But the design might change for a single supply, so I'll keep that in mind, thanks. \$\endgroup\$ – Kasdonchu Apr 8 '16 at 7:02

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