There are some truly fundamentals, binary arithmetic, Boolean algebra, and logic switches. Binary digits are either 1 or 0 and a group can represent a number where the value of each position is 2 to the nth where n is the position index of the digit so the value of the group/word is the sum of the position values that are 1. Analogous to the decimal system where the digits are 0 to 9.
Boolean algebra deals with true/false conditions which are also binary values so in digital circuits a signal represented by a voltage of 0 or not zero can also represent binary values. A simple row of on/off switches wired to light bulbs can therefore display a value where an "on" switch and light correspond to the binary value of that position in the row.
Logic/Boolean functions use multiple switches where series connected switches do the "and" function because both must be on to light the bulb. Connect them in parallel for the "or" then either switch 1 or switch 2 will light the bulb.
About all that is needed from the engineering aspect is that transistors can act as on off switches(switching circuits) and can be connected in parallel or series.
In practice, only a few transistors can be connected directly together so a network of functions are connected to generate complex functions. Each function becomes a logic level and has a finite time to resolve. The sum of delays for each level in the path is the path delay. The path with the longest delay becomes a critical performance factor.(critical path) There may be confusion over the levels(timing) of a design and the levels of metal used to physically connect the transistors.
The critical path delay limits the max clock frequency since the clock period must be longer than the critical path.
Use of a clock/synchronous design is a solution to problems caused by race conditions. As signals propagate thru a path, the output may change more than once before being resolved since all possible paths do not have the same delay. "glitch" is the common term.
A counter consist of a group of storage elements that are inputs to an adder/incrementer which is input to these elements. The counter should change by 1 increment when an input control signal arrives. A set of 2 input ands can gate the adder to the counter. If the counter is made up of latches which are simply cross-coupled gates, the duration of the control signal may be long enough that more than one increment occurs. Instead of latches, D flip-flops are used because they can change only once per clock edge no matter what the period. Another couple of things now apply: The input value must be stable for the setup time before the clock edge and for the hold time afterward.
Many FFs can change on any given edge so all the clocks must occur very near the same time else an input may change during this window.