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Do ESD discharges pass through capacitors?

My circuit is shown below. Basically i'm concerned that if there is a DC component to ESD that ESD Sensitive IC 2 may not be protected by the ESD diode. The diode can't be placed earlier because there is DC power on the antenna line which would short through the ESD diode.

schematic

simulate this circuit – Schematic created using CircuitLab

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  • \$\begingroup\$ You can probably get an ESD diode with a voltage rating high enough to place on the DC side of the cap. What is the DC voltage? D1 may provide some protection to IC2. But it would be better to place the diode (or another diode) on the other side of C1. \$\endgroup\$
    – user57037
    Apr 14, 2016 at 4:38

2 Answers 2

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Yes, it can pass through capacitors. For IC2, add another capacitor from Vin to GND -- this will absorb the ESD pulse.

typically ESD is from 100 pF & 2 kV -- so 100 nF will limit the ESD pulse to 2 V.

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  • \$\begingroup\$ Thanks. Could you please explain a little bit on how you got the answer of the 10nF cap limiting the pulse to 2V? \$\endgroup\$ Apr 14, 2016 at 2:28
  • \$\begingroup\$ ESD is 2 kV stored on 100 pF. When that is connected to 10 nF, the charge is shared, so (using Q=C.V). 100p*2kV=100n*2V. (Sorry miscalculation corrected in post). \$\endgroup\$
    – jp314
    Apr 14, 2016 at 3:07
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    \$\begingroup\$ Typically? - Hardly. You are confusing what is done in a rather mild test with what can happen in the real world. I'd suggest an edit to that effect. An ESD test result always comes with a voltage level that the particular type of test was done at, 2 kV is very low and is the minimum for the HBM model of the JEDEC standard. \$\endgroup\$ Apr 14, 2016 at 3:29
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    \$\begingroup\$ @jp314 Poor choice of words on my part at the better part of 1 AM, but I know exactly what I'm talking about. You can't say that the cap will limit the ESD pulse to 2 V. The current will flow through the cap almost unimpeded, and be limited to whatever the TVS clamps to. \$\endgroup\$
    – Matt Young
    Apr 14, 2016 at 12:37
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    \$\begingroup\$ As I said in my answer, 100 nF to GND at the DC input to IC2 will limit a 2 kV ESD pulse to 2 V at that IC. \$\endgroup\$
    – jp314
    Apr 14, 2016 at 13:11
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Well given that at higher and and higher frequencies the impedance of a capacitor gets lower and lower ... it is obvious from inspection that an ESD pulse can pass right through.

And then there is breakdown and surface effects.

There are external circuits/products that are meant for this use precisely.

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