# How does PWM generate an analog signal?

AFAIU, PWM works as follows:

According to the value of the counter in the microcontroller, a square wave is generated at a designated output pin of the $\mu C$. The duty cycle of this square wave is determined by the previously set compare value of the counter and the current value of the counter.

So, at a given time, if the counter is, say, higher than the compare value, the square wave at the designated output will be at high voltage ($V_H$). Similarly, if counter is lower than the compare value, the square wave at the designated output will be at low voltage ($V_L$).

I have heard that we are able to simulate analog output using PWM. For example, if the duty cycle of the output square wave is, say 60%, then AFAIK, we treat the output signal as if it is $(V_H - V_L) * duty cycle$ for the whole duration of that PWM period.

But how is this possible? In reality, a 60% duty cycle means that the output signal is fully at $V_H$ for 60% of the PWM period and it is fully at $V_L$ at the remaining 40% of the PWM period.

How are we able to treat the output signal as if it is $(V_H - V_L) * duty cycle$ for the whole of the period?

• low pass filter – JIm Dearden Apr 14 '16 at 19:24
• @JImDearden Could you elaborate with an answer if you have time to do so? – Utku Apr 14 '16 at 19:24
• @Utku, try it for yourself. In simulation or real life, apply a low pass filter (with cut-off frequency at least, say, 1 decade below the PWM signal's frequency) to a PWM signal. What do you see? – The Photon Apr 14 '16 at 19:26
• The PWM is a square wave with a DC component, the higher the duty cycle, the higher the DC component. With an LPF, you can leave the DC component alone. – Claudio Avi Chami Apr 14 '16 at 19:26