Assuming either is allowed to address a common bus - and this is not clear from description, then you can transfer data blocks with two semaphore bits.Bits in RAM imply shared non-collision access. But bits can be on port pins- see below.
Many moons since I last did this but it should be as simple as
- Master: Deposit data. Set "Data ready"
- Slave: Read data. Set "Data taken"
- Master: Reset "Ready" (first). Reset "taken"
If your hardware does not allow this directly you can implement a hardware device that flips from bus to bus using a similar protocol with the "bits" on port pins. (Slight change in handshaking but same principle).(M:Take this, S:OK, M:Noted, S:Thanks = eg GPIB)
BUT - why limit yourself to "genuine shared RAM" when you can achieve a functionally equivalent result with a coms link?. Speed may be a reason. How much speed do you need. Some of the methods below can be very fast.
There are a large number of serial interconnect schemes that allow this sort of interaction - some made for interprocessor use and some easily enough adapted. SPI, IIC (multimaster), RS485 ( ... CAN), and even / of course RS232. When all else fails there is "ethernet" in all its variants (up to ~Gb/s) or USB (up to hundreds of Mb/s.)