I designed my first PCB for a DC-DC boost converter only to find that it produced very noisy output. The design is based around the MIC2253.
Here's a schematic:
Although my circuit allows for different combinations of input voltages (Vin) and output voltages (Vout). The case I am debugging is with Vin=3.6V and Vout=7.2V. The Load was a 120 ohm resistor. I calculated the duty cycle D=0.5 (i.e. 50%). This seems to be within the 10% minimum and 90% maximum duty cycle limits specified in the datasheet. The other components, i.e. caps, inductors, resistors are the same or similar to what the data sheet suggests in its application example.
The design appears to give the correct RMS step up voltage on the output, but, after viewing the signal through an oscilloscope I see damped sinusoidal voltage oscillations appearing periodically which seems to be initiated by the switching of the inductor. I see the same oscillations on almost every ground point on the board. The oscillations on the output are large, that is 3 V peak to peak. After doing a bit of research it seems that my problems are not particular to my choice of converter, but, to problems with my PCB layout (see links below). I'm not sure how to fix my layout to ensure acceptable results.
These documents seem useful for debugging the problem:
- http://www.physics.ox.ac.uk/lcfi/Electronics/EDN_Ground_bounce.pdf
- http://www.analog.com/library/analogDialogue/cd/vol41n2.pdf
- http://www.enpirion.com/Collateral/Documents/English-US/High-frequency-implications-for-switch-mode-DC-R_0.pdf
- http://www.maxim-ic.com/app-notes/index.mvp/id/3645
- http://www.maxim-ic.com/app-notes/index.mvp/id/735
I've attached three images. "original pcb.png" contains an image of the board I am having issues with. It is a 2 layer board. Red is the top copper. Blue is bottom copper.
"current loops.jpg" shows the prototype board with orange and yellow overlays of the two different current paths used to charge (orange) and discharge (yellow) the inductor. One of the articles, ( http://www.physics.ox.ac.uk/lcfi/Electronics/EDN_Ground_bounce.pdf ), suggested that the two current loops should not change in area, thus, I tried to minimize their the change in area in a new layout I started in "pcb_fix.png". I hacked the original PCB so that it was closer to this new layout, but, the performance of the board didn't change. It is still noisy! The quality of the hack isn't as good as shown in "pcb_fix.png", however, it is a fair approximation. I would have expected somewhat of an improvement, but, I didn't see any.
I'm still not sure how to fix this. Maybe the ground pour is causing too much parasitic capacitance? Perhaps the caps have too much impedance (ESR or ESL)? I don't think so, because they are all ceramic multilayer and have the values and dielectric material requested by the datasheet, i.e. X5R.Perhaps my traces might have too much inductance. I chose a shielded inductor, but, is it possible that its magnetic field is interfering with my signals?
Any help would be very appreciated.
At the request of a poster, I've included some oscilloscope output under different conditions.
Output, AC Coupled, 1M Ohm, 10X, BW limit OFF:
Output, AC Coupled, 1M Ohm, 10X, BW limit OFF:
Output, AC Coupled, 1M Ohm, 10X, BW limit 20Mhz:
Output, AC Coupled, 1M Ohm, 1X, BW limit 20Mhz, 1uF, 10uF, 100nF caps and 120 ohm resistor shunting output, i.e. they are all in parallel:
Switching Node, DC Coupled, 1M Ohm, 10X, BW limit OFF
Switching Node, AC Coupled, 1M Ohm, 10X, BW limit 20Mhz
ADDED: Original oscillations attenuated greatly, however, under heavier load new undesirable oscillations occur.
Upon implementing several of the changes suggested by Olin Lathrop, a large decrease in oscillation amplitude was observed. Hacking the original cicuit board to approximate the new layout helped somewhat by bringing down the oscillations to 2V peak to peak:
It will take at least 2 weeks and more money to get new prototype boards so I am avoiding this order until I sort out the problems.
The addition of additional input 22uF ceramic capacitors made only a negligible difference. However, the overwhelming improvement came from simply soldering a 22uF ceramic cap between the output pins and measuring the signal across the cap. This brought the noise maximum amplitude to 150mV peak to peak without any bandwidth limiting of the scope!! Madmanguruman suggested a similar approach, with the exception that he suggested altering the probe tip instead of the circuit. He suggested putting two caps between ground and the tip: one 10uF electrolytic and one 100nF ceramic (in parallel I assumed). In addition, he suggested limiting the bandwidth of the measurement to 20Mhz and putting the probes on 1x. This seemed to have a noise attenuating effect as well in about the same magnitude. I guess I can conclude that there was originally insufficient capacitance at the output.
I'm not sure if this is a acceptably low noise floor or even a typical noise amplitude for a switching converter, but, it is a massive improvement. This was encouraging so I went on to test the robustness of the circuit under more significant loading.
Unfortunately, under heavier loading the circuit is producing some new weird behaviour. I tested the circuit with a 30 ohm resistive load. Although the board does still boost the input voltage as it should, the output now has a low frequency sawtooth/triangle wave output. I'm not sure what this indicates. It looks like constant current charging and discharging of the output cap to me at a much lower frequency than the switching frequency of 1 Mhz. I am unsure why this would happen.
Probing the switching node under the same test conditions showed a messy signal and horrible oscillations.
Solution Found
The question has been answered and the circuit is performing adequately. The problem was indeed related to the stability of the control loop as Olin Lathrop suggested. I received may great suggestions, however, Olin was the only one to suggest this course of action. I therefore credit him with the right answer to my question. However, I greatly appreciate everyone's help. Several of the suggestions made were still relevant to improving the design and will be implemented into the next revision of the board.
I was compelled to follow Olin's advice also because I noticed that the frequency of the sawtooth/triangle output had the same frequency of appearance as the square wave portion of the signal at the switching node. I thought that the ramp up of the voltage on the output was due to successfully energizing the inductor and the ramp down was due to failure to adequately energize the inductor during the oscillatory portion of the signal on the switching node. It made sense that this was a stability problem because of this.
By following Olin's suggestion to take a closer look at the compensation pin, I determined that increasing the capacitance of the RC series network on the comp pin restored the stability of the control loop. The effect that this had on the switching node was significant as can be seen by the square wave output:
The low frequency sawtooth/triangle wave was eliminated.
Some high frequency noise (100Mhz) may still exist on the output, but, it has been suggested that this is just an artefact of the measurement and disappears when the 200Mhz scope's bandwidth is limited to 20Mhz. The output is pretty clean at this point:
I suppose I still have some questions regarding the high frequency noise, however, I think that my questions are more general and not specific to this debugging question, so, the thread ends here.
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contains the rule.post-text img { max-width: 630px; }
, which ought to resize every image on every post to a reasonable size. I don't object to posting large images; they'll compress quite nicely in PNG and we can open the image in a new tab and zoom in to check, say, pin overlap and grid matching errors. \$\endgroup\$