I have a circuit set up as in the following diagram. There are 4 vertical power rails, the left-most 3 are supplied with 15v, and the right most 1 is supplied with 5v. The purpose of the circuit is to drive a multiplexed array of electro-permanent magnets. It does this by using the shift registers running down the right side to operate the sinks and sources on the left side. I've only sketched up 4 of the electro-permanent magnets but the array size is 30x8. The bottom two drivers on the left provide the sink/source for the 8 rows, the remaining drivers provide the sink/sources for the 30 columns.

The programme being uploaded to the AVR will initially cycle through all of the electro-permanent outputs and polarise them one way, before making another pass and polarising them the opposite way.

When I supply power to the circuit and connect an AVRISP mkII to programme the AVR it all runs fine. If I subsequently remove the programmer and supply power to the circuit again it doesn't seem to run.

Occasionally when I plug it in I can hear a faint buzzing from the electro-permanent magnets as though it's trying to supply power. In this scenario I'm assuming that it's either not able to draw enough current to fully active the electro-permanent magnet, or the AVR is running too fast and not activating the coil for long enough to take effect.

I've read this similar question ATTiny Circuit only works when connected to AVR ISP and added a capacitor between the Vcc and Gnd connectors of the AVR but it makes no observable difference.

Firstly, is there anything obvious in my breadboard diagram that could be causing this? Secondly, given that I have no scope, what else can I try to debug this?

The breadboard

breadboard diagram

Power supply schematic

power supply schematic

  • 2
    \$\begingroup\$ Do you have a pullup on your reset line? \$\endgroup\$ Apr 19, 2016 at 17:16
  • \$\begingroup\$ I do indeed - 4.7KΩ \$\endgroup\$
    – Matt
    Apr 19, 2016 at 17:42
  • 1
    \$\begingroup\$ Are you powering it differently when it's not connected to the programmer? \$\endgroup\$ Apr 19, 2016 at 17:56
  • \$\begingroup\$ @Matt ok, follow up, when the programmer is unplugged, and the setup is powered, does the reset pin actually see VCC on it (through the pullup)? Another thing, you're using magnetics, so it could be you are inducing some noise in the reset that somehow the programmer is protecting against (maybe more capcitors). Also, generally a good idea to optocouple magnetics if possible, better than blowing out sensitive I/Os. \$\endgroup\$ Apr 19, 2016 at 18:00
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    \$\begingroup\$ The lack of a scope for gathering information, may reduce the chances of success, but here are 3 points: (a) Try to reduce the size of the problem down to just the AVR running a "blinky" program, get that to work without the ISP attached, and build-up the complexity from there. Troubleshooting a complex system which hasn't ever worked (without the ISP) is a recipe in frustration. (b) Your power supply design is unclear to me - please provide the schematic of that part. (c) You said that you "added a capacitor [...] between Vcc and Gnd" where physically, what capacitor type, what value? \$\endgroup\$
    – SamGibson
    Apr 19, 2016 at 18:03

1 Answer 1


Try adding one or more bypass capacitors to your atmega. And maybe every other IC.

Clocked logic ICs (like a microcontroller) don't use power continuously, they draw very high currents in very brief pulses, usually once for every clock tick. Combined with parasitic capacitance and (especially) parasitic inductance in the power supply traces, these current peaks can cause the voltage at the microcontroller to sag to unacceptable levels. Additionally, these current peaks can cause significant noise on the power supply traces which can disturb other chips as well.

Adding a small capacitor as close as you can to the logic IC helps satisfy these currents, bypassing the power supply (hence the name bypass capacitor), and decoupling these current peaks from other parts of your circuit (hence the alternative name decoupling capacitor).

Getting the correct value of bypass cap(s) is fairly complicated and hard to do right, but for low-medium frequency circuits, the value isn't too critical, and a 100nF ceramic usually gives acceptable results. To be sure, you could try a 100nF ceramic in parallel with a 10µF electrolytic, right next to the atmega.

As your other chips are also digital chips (clocked by shifting in data from the atmega, I assume?), they might also benefit from bypass caps. Especially if they are sinking or sourcing current.

If this doesn't help, try determining if the atmega starts at all or if it resets, by having its start-up routine pulsing a led for say, 100ms. When switching currents, it can be easy to generate EMI that is picked up somewhere in your circuit, causing your atmega to trip and reset.

You mention driving electromagnets, which are inductors. Stopping a current through an inductor can cause large voltage spikes that you have to deal with properly, e.g. using flyback diodes or some other sort of snubber.

  • \$\begingroup\$ Agreed (+1) - I also suspect the decoupling, although we know more has been added (awaiting reply to my question on this). Assuming that the physical layout matches the Fritzing diagram, the inductance between the capacitors near the voltage regulator and the ICs themselves, won't be helping :-) \$\endgroup\$
    – SamGibson
    Apr 19, 2016 at 18:13
  • \$\begingroup\$ The start-up routine now works with, though the AVR now resets afterwards. I'll get some ceramic capacitors on order to pair up with the electrolytic ones. From reading the datasheets I was under the impression that the drivers (ST 2803, and MIC 2981) had diodes built in to prevent this spiking you mention. \$\endgroup\$
    – Matt
    Apr 19, 2016 at 19:42
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    \$\begingroup\$ 2 years on and those ceramic capacitors finally arrived. Adding them at the suggested locations has solved the problem, thank you. \$\endgroup\$
    – Matt
    Apr 8, 2018 at 15:15
  • \$\begingroup\$ @Matt Glad to hear it helped :) \$\endgroup\$
    – marcelm
    Apr 3, 2019 at 20:34

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