For some ADCs and DACs I'm using I need a 24.576MHz clock (96kHz * 256). Obviously I can use a low jitter audio clock generator. However, I have a AM335x processor available that claims to have a low jitter clock (ADPLLJ). Could I use this clock? It appears that it can be divided and multiplied to reach that frequency and it would save some trouble of getting a clock generator and a crystal oscillator if I could use this low jitter clock. The clock is explained in the AM437x reference manual. The clock also exists on the AM335x but the reference manual only mentions it briefly.
Well, it seems you can't.
I guess you'll use McASP0 or McASP1 to drive the DAC/ADC. Their clock is derived from either CLK_M_OSC (the oscillator output, so no PLL) or CORE_CLKOUTM4/2 aka L3S_CLK (see page 4549, also confirmed by table Table 8-23 page 1143). This clock is itself derived from ADPLLS (see page 1141), not ADPLLLJ. ADPLLLJ feeds some other perpherals (see page 1144).