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How to get a default UCF file of the Xilinx Virtex-5 XC5VLX110?

It doesn't seem to be anyhere. If I have to make it by myself, would you let me know how to generate a UCF file for a Xilinx Virtex-5 XC5VLX110?

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    \$\begingroup\$ Is this for an XUPV5 board? By the way, the search pattern for Google would be "Master UCF file" instead of default UCF. Most vendors offer such an "master UCF" containing all pins of a development board. \$\endgroup\$ – Paebbels Apr 22 '16 at 11:12
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There is no such thing as a "default UCF file" for a Xilinx part. The names and functions of pins are entirely dependent on your board design.

Use the Xilinx ISE Constraints Editor or PlanAhead to create a UCF file.

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  • \$\begingroup\$ Or better, use the Xilinx tools to get you started, and do the rest in a simple text editor. \$\endgroup\$ – Brian Drummond Apr 22 '16 at 11:41
  • \$\begingroup\$ Can the Xilinx ISE Constraints Editor or PlanAhead offer UCF file ? or just edit? \$\endgroup\$ – Carter Apr 23 '16 at 14:07
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The Virtex-5 XC5V110T is for example mounted onto the Xilinx XUPV5 board. This board is equivalent to the ML505 board: same pin-out, same external devices, but a "bigger" FPGA.

All Xilinx references regarding the XUP5 board are listed here. The undocumented and incomplete Master UCF Pin Constraints file can be found on the same website.


Our PoC-Library ships with a set of UCF, SDC and XDC files for many common development boards, including Xilinx University Program (XUP) boards, like Atlys, ML505 or ZedBoard. See the ucf/ folder for a full list of supported boards.

We split the master UCF file of each board into small portions. For example there is the:

Additionally, the folder contains some UCF files, needed for cross-clock FIFOs, synchronizers and so on. Such constraints are not covered by master UCF files.

How can these files be used?

  1. You can copy all your needed I/O interfaces into one own UCF file, which creates your own project specific master UCF. Or
  2. You can import multiple UCF files into your Xilinx ISE project (ISE passes all of them to the translate step). If you decide, that for example LEDs are no longer needed, you disable the UCF file or remove it from the project.

Advantages:

  • The naming convention is hopefully consistent across all of our UCF files. So you can implement the same design on multiple boards, by just changing the UCF files or your top-most HDL design file.
    Example: KC705 => VC707 => ZC706
  • It's possible to switch to newer FPGA boards with minimal changes.
    Example: ML505 => KC705
  • You can switch to alternative FPGA platforms.
    Example: KC705 (Kintex-7) => DE4 (Stratix IV)
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  • \$\begingroup\$ Thanks yes, I also too knew that about Most vendors offer such an "master UCF" containing all pins of a development board. that's what exactly what I want. Master UCF file. how to get a Master UCF file of mine? \$\endgroup\$ – Carter Apr 23 '16 at 3:47
  • \$\begingroup\$ You create one based on your board. You can create one using your PCB file, some programs such as Altium allow you to generate a UCF file from your schematic. \$\endgroup\$ – FarhadA Apr 23 '16 at 4:08
  • \$\begingroup\$ @Carter ... but you haven't named your board yet ... \$\endgroup\$ – Paebbels Apr 23 '16 at 13:44

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