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I have a few questions about gpio.

First

What if two push-pull pins with high level connected? My point of view is that there is no way for current and nothing bad will happen. And reading of pin level will give us 0.

Second

What if two input pins with pull-up connected? I think it will increase current level in line but nothing bad will happen. Reading of input will give us 1.

Third

Why should I use push-pull as output if I want to drive a line? What's wrong with switching pull-up and pull-down resistors?

And fourth

Could you give an example of pins configuration which can cause both or one of them to burn out?

Thanks.

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    \$\begingroup\$ How come in "first" the pin level is 0? If driving a line quite often there is a load connected at the far end and push-pull will deliver a full drive voltage to that load. \$\endgroup\$ – Andy aka Apr 24 '16 at 10:44
  • \$\begingroup\$ @Andyaka if two push-pull pins connected and set to high it means that counter transistors are opened. It's like connecting battery plus to itself. So current just has no way and line will be low. This is how I understand it. And I ask "Is it right?" \$\endgroup\$ – Long Smith Apr 24 '16 at 10:52
  • \$\begingroup\$ So the pin level is therefore high and not zero. \$\endgroup\$ – Andy aka Apr 24 '16 at 11:50
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    \$\begingroup\$ you could use pull up and pull down to encourage the signal up or down, but it weakly pulls either way. Just think of the other side being a pull up and you being a pull down, you cannot automatically assume either state for the signal, it will be somewhere in the middle. Wired-or is quite common (one person drives low otherwise it floats high), but someone should be driving (source or sink). \$\endgroup\$ – old_timer Apr 24 '16 at 12:37
  • \$\begingroup\$ should always do your system engineering and design/define the interfaces as a output of that. \$\endgroup\$ – old_timer Apr 24 '16 at 12:39
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First

What if two push-pull pins with high level connected? My point of view is that there is no way for current and nothing bad will happen.

[Updated following suggestions from Wouter van Ooijen - thanks Wouter!]

Parallel connecting push-pull outputs from the same IC can work. The current flow between the outputs (since no two outputs are identical, even on the same IC) should be small. This is sometimes done to increase the current capability of the output.

However examples of potential problems include (a) not switching all connected outputs simultaneously (which can then cause the problem described in your "fourth" question). I've seen this when engineers try to use this technique, and they forget to switch all pins - suddenly they have a very hot IC. Even brief differences in timing between the switching of the outputs can trigger other issues e.g. due to brief high current flow and marginal decoupling; and (b) connecting push-pull outputs which, although both at a logic "high", are actually at different voltage levels e.g. ICs connected to different power rails.

And reading of pin level will give us 0.

No. A pin set to "high" as you said, will read "high" (i.e. logic 1) when connected to an input.

Second

What if two input pins with pull-up connected? [I assume you mean pull-up resistor] I think it will increase current level in line

Consider the very high input resistance of typical inputs. That means that just connecting a pull-up resistor to an input, will only cause a tiny current to flow.

nothing bad will happen. Reading of input will give us 1.

True. Inputs should always be pulled up or down to a suitable voltage (e.g. a power rail), usually through a resistor although exact details depend on several factors. Unconnected inputs are another bad design practice.

Third

Why should I use push-pull as output if I want to drive a line? What's wrong with switching pull-up and pull-down resistors?

It's not clear what you mean by "switching pull-up and pull-down resistors". A typical alternative to using push-pull output drivers, is an open-drain (open-collector) arrangement, with pull-up resistor(s) as used for the I2C bus, for example.

Some advantages of push-pull include higher speed and output drive current; disadvantages include current consumption and inability to safely have multiple outputs active simultaneously on the same signal line (see answer to your next question below). At a more advanced level, things like slew-rates, termination and EMI are also factors to take into account.

And fourth

Could you give an example of pins configuration which can cause both or one of them to burn out?

The classic example of that dangerous situation is two push-pull outputs (in the same or different devices), connected together, with one driven to a logic high, and the other driven to a logic low. That will effectively place a short-circuit across the power supply (limited by the resistances internal and external to the devices). Whether it actually causes either to "burn out" will depend on what protections the devices have for excessive output current, and the resistances involved.


Based on your questions. I suggest it would be worthwhile reading more about the internal circuitry in common push-pull and open-drain (open-collector) IC outputs, and how they work. I expect that will help to clarify your knowledge in this area.


Edited to add - some other relevant EE.SE Q&A and Wikipedia pages which might be useful reading include:

STM32 Understanding GPIO Settings

Push-pull/open drain; pull-up/pull-down

https://en.wikipedia.org/wiki/Push%E2%80%93pull_output

https://en.wikipedia.org/wiki/Open_collector

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  • \$\begingroup\$ I don't see the problem in connecting outputs that are set to the same level. \$\endgroup\$ – Wouter van Ooijen Apr 24 '16 at 15:32
  • \$\begingroup\$ @WoutervanOoijen - Say you have 2 ICs; both have an output set to logic "high" and those 2 outputs are connected together - but one chip's output is more heavily loaded already and is at a significantly lower voltage. What current will flow from the higher voltage output to that lower voltage (but still "logic high") output? See what I mean? \$\endgroup\$ – SamGibson Apr 24 '16 at 15:46
  • \$\begingroup\$ Note that the question is about GPIOs, presumably of the same micro-controller. But even when different chips are involved I don't see the problem, unless those chips have different supply voltages, or one pin has a low resistance but can't handle the full load. \$\endgroup\$ – Wouter van Ooijen Apr 24 '16 at 15:50
  • \$\begingroup\$ "presumably of the same micro-controller" - I wasn't making that assumption; I agree it's ambiguous. "unless those chips have different supply voltages, or one pin has a low resistance but can't handle the full load" - exactly - those are examples of when connecting multiple outputs at "logic high" can cause problems. I didn't want to try to list all possible situations; I'm sure you and others could come up with a bigger list than I could write! I was trying to say that it can work OK (paralleling outputs is sometimes deliberate), but can also be a problem - all depends on the exact details. \$\endgroup\$ – SamGibson Apr 24 '16 at 16:01
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    \$\begingroup\$ The question title mentions the specific chip; having more than one such chip, running on different powers, is IMO extremely unlikely. IMO the answer should be "it is no problem" with an explanation for the problematic boundary case (different supplies) in the 'small print'. Your answer seems to be the other way round, and fails to mention the 'different supplies' case as the only practical problem. Hence my -1. \$\endgroup\$ – Wouter van Ooijen Apr 24 '16 at 16:13

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