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In the testbench for a SystemVerilog module, I have the following array declaration and initialization:

real testVals [][] = '{
    '{1.5, 1.5}, 
    '{2.0, 3.0},
    '{0.0, 0.0},
    '{-1.5, 1.5},
    '{-1.5, 4.0},
    '{-1.5, 3.0},
    '{-1.5, -3.0},
    '{9.5E255, 4.2E200},
    '{9.5E500, 4.2E200}   // line 63
};

When I try to compile the code using QuestaSim, I get this error:

** Error: (vlog-13037) fp_adder_tb.sv(63): near "9.5E500": Numeric value exceeds 32-bit capacity.

Why do I get an error about a 32-bit capacity limit when the data-type is real? This would make sense for an integer or int, but it should be a double-precision float. Also, 9.5E255 is also well beyond the range of a 32-bit value - why is it okay? If I remove the one offending line, it compiles without a problem.

QuestaSim version: QuestaSim-64 vlog 10.4c Compiler 2015.07 Jul 19 2015

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1 Answer 1

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Even floating point numbers have limits. 9.5e+500 is outside the limits of binary64 (4.9e-324 to 1.8e+308), which is what real implements.

As for why it's complaining about "32-bit capacity", that I couldn't tell you. Might be a compiler bug.

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  • \$\begingroup\$ Yup... I had a brainfart when I thought about the range of a double-precision float. You are correct that I'm requesting a value that is out of range, and that the "32-bit" thing is probably just a buggy compiler error message. \$\endgroup\$
    – skrrgwasme
    Apr 25, 2016 at 8:06

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