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I'm in the process of designing an 8 layer PCB with a stackup of:

Signal, GND plane, Signal, Power plane, Power plane, Signal, GND plane, Signal.

For calculating the trace widths necessary for 50ohm traces I'll be using either https://www.eeweb.com/toolbox/microstrip-impedance/ or http://wcalc.sourceforge.net/cgi-wcalc.html

I assume it's correct to use the microstrip model for the top and bottom signal layers but what would be the correct model for the inner two layers from these websites.

Thanks!

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I think the correct model would be a stripline.

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  • \$\begingroup\$ With the stripline model is it between the GND and PWR plane? As I've only seen it when it's GND, Signal, GND. \$\endgroup\$ – slasher53 Apr 27 '16 at 1:59
  • \$\begingroup\$ There may be a small variation in capacitance due to the bias, but that should be negligible. \$\endgroup\$ – Simon Richter Apr 27 '16 at 4:19
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As already mentioned, stripline is the model for inner layers.

Power is ground to high frequency AC.

Note that the layer to layer impedance will very probably not be the same. If you have signals that cannot go through discontinuities, then use single layer routing for those (surface breakout -> transition layer -> destination device breakout).

If you do have impedance controlled signals that will change layers across the PCB, remember to take the reference through the board as well.

For instance, if you have a signal that transitions from layer 1 (reference layer 2) to layer 8 (reference layer 7), take a via through the board that connects layer 2 to layer 7 very close to the signal transition.

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