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So I am using the following circuit to switch between VIN 0-30v and USBVIN 5v.

I thought I found the ideal solution until I realised the FET in the schematic only has a max VGS of 8V. But I don't fully understand how the max ratings work in a situation like this because when VIN is supplied both the Source and the Gate will be the same voltage.

Also the Vds is only 20v as above the Fet isn't being used in a normal application so I'm not sure if this will cause a problem?

So my question is will the circuit be ok along with the FDN340P or do I need to swap it out with a FET with a max VGS and VDS of at least 30v?

enter image description here

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  • \$\begingroup\$ As long as the voltage between the Gate and the Source stays below 8V, your fine, even if Vg is 93V and Vs is 100V, your still good as (Vs-Vg < 8, Vg-Vs < 8 is also fine as the ratings are usually the same for positive and negative gate voltages) \$\endgroup\$
    – Sam
    May 1, 2016 at 23:37
  • \$\begingroup\$ I have also just realised that drain to source voltage is only 20v, is that a problem to? \$\endgroup\$ May 2, 2016 at 11:25
  • \$\begingroup\$ Yeah, that'll be a big problem, see, when you exceed the Vds ratings fets tend to turn them selves on and stay on until the high voltage is removed (called breakdown - semiconductor equivalent of arc-over), needless to say, it doesn't do the fets much good. Good news is that you don't usually need much margin, so it's quite common to see a 40V fet inn a 30V application \$\endgroup\$
    – Sam
    May 2, 2016 at 23:36
  • \$\begingroup\$ Thats what I thought, just trying to find an alternative part in the smallest package available, SI2309CDS-T1-GE3 seems like a good match but the only difference is that the test VGS is much higher 10v rather than 4.5v. Would it still be a good match. \$\endgroup\$ May 3, 2016 at 7:54
  • \$\begingroup\$ Well, in the datasheet it's been characterised at both 10V and 4.5V (0.35ohms at 10V, 0.45ohms at 4.5V) so it'll still work, as long as you apply more than the threshold voltage (-3V in this case) it'll turn on, it'll just have a higher Rds \$\endgroup\$
    – Sam
    May 3, 2016 at 9:28

1 Answer 1

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Your circuit is OK.

To understand this, it is best to examine 4 cases: (assume USB ~ 5V, and VIN 0..30 V).

0) VIN low and USB low: everything off, no problem. 1) VIN low, and USB high: The FET will be on with G=0, and S=D=USBVCC. Everything OK, as long as D3 is greater than a 5 V zener 2) VIN high and USB low: This will put VIN (30 V - diode = 29.3 V) on the gate; FET will be off, and D (USBVCC) = 0 is OK; S will be VIN-D3 = 29.3 V. So VGS will be ~0 and OK. No problems. 3) VIN high and USB high: Similar to #2 --FET still off (VGS=0).

There are some potential 'corner' cases -- when VIN is rising and USB is high. You should check that there is no back feeding from VIN to the USB. Your arrangement of D2 & D3 ensures that VGS will remain zero (i.e. FET off), so all is OK. Another case is VIN ~ 4 V and USB high -- in this case, the FET G will be 4-0.7 = 3.3 V, and the FET will be barely on, although power should flow from USB. You should ensure that wen VIN is 'off', it really is off.

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  • \$\begingroup\$ Ok thanks, I have just edited my question about Drain Source Voltage as well because the FET in question only has a Vds of 20v \$\endgroup\$ May 2, 2016 at 17:30

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