I'm getting the following error on all of my GND vias. Internal Plane 1 is my GND plane:
Starved Thermal on Internal Plane 1: Via (11.002mm,23.798mm) Top Layer to Bottom Layer. Blocked 3 out of 4 entries.
According to this techdoc: https://techdocs.altium.com/display/ADOH/Internal+Power+and+Split+Planes
the error is due to isolated GND plane sections or not enough copper around the via to allow thermal relief. That or the vias don't go through the GND plane. However, the error appears only if the via hole size is between 0.47 mm and 0.51 mm. Anything smaller/larger that that doesn't generate the error. Although it gives me a workaround, I'd like to keep my via hole size to 0.5 mm.
I haven't separated my GND plane and all I have running through the plane are several vias and through hole pads. I also verified that the vias go through all of the layers and not just some of them so they should definitely reach the GND plane.
UPDATE:
If I change the connect style rule from Relief Connect to Direct Connect, the errors don't appear - see the screenshot.