My question is not on 'how can' but 'if can'. So I believe people with sufficient experience on any FPGA family might be able to help me out here.
Problem Statement: I need to model a very basic control system on an FPGA such that the 'plant' runs as a Verilog(HDL) module on the FPGA (not just simulation) and the controller is implemented as a C executable running on NIOS2 softcore processor on the FPGA (Altera Cyclone IVGX).
All the manuals and posts that I read which use the CAD tool (Qsys,Quartus,SOPC builder etc) take only examples of how a NIOS 2 softcore processor can be flashed on an FPGA and get it doing various stuff. But can I also have a system where the NIOS2 is being synthesized along with other Verilog(HDL) modules and interacting with any code running on the softcore processor?
I understand that by posing such a question I may provoke some for a RTFMish response, but i did scroll through the design handbooks looking for such topic but couldn't find one.
All I need to know is if this can be done so that I spend more time reading the manuals even closely than before.