What are the advantages of using FPGAs over TTL in intro computer architecture?

Question

I teach the one and only computer architecture course at a liberal arts college. The course is required for the computer science major and minor. We do not have computer engineering, electrical engineering, other hardware courses, etc. My primary goal in the course is for students to understand all the way down to the gate level how computers work, which I believe they learn best through a hardware lab and not just through a textbook (Computer Organization and Design by Hennessy and Patterson). My secondary goal is to excite them about computer architecture and increase their excitement about computer science. Preparing them directly for industry is not a goal, although motivating them to study more computer architecture is. The students have generally not had any experience building anything or taking a college-level lab course. Typically, 10-15 students take the course per semester.

I have been teaching the course since 1998 in a manner similar to how I was taught computer architecture and digital electronics back in the late 1980s at MIT: using DIP TTL chips on powered breadboards. On the first hardware lab assignment, students build a full adder. About halfway through the semester, they start building a simple computer with an 8-bit instruction set. To reduce wiring, I provide them with a PCB with some of the electronics (two D flip-flops, two 4-bit LS 181 ALUs wired together to act as an 8-bit ALU, and a tri-state buffer). On the first of these labs, they derive the (very simple) control signals for the two instruction formats and build the circuit, entering instructions on switches and reading results from lights. On the second of the labs, they add a program counter (2 LS163s) and an EPROM (which my original question was about, before it switched to how I should teach intro architecture). On the final lab, they add a conditional branch instruction. While the students spend a fair amount of time wiring and debugging, I feel that's where much of the learning takes place, and students leave with a real sense of accomplishment.

People on this forum have been telling me, though, that I should switch to FPGAs, which I haven't worked with before. I'm a software engineer, not a computer engineer, and have now been out of school for a while, but I am capable of learning. I wouldn't be able to get much money (maybe a few thousand dollars) for replacing our existing digital trainers. We do have a single logic analyzer.

Given my goals and constraints, would you EEs recommend that I stick to my current approach of switch to one based on FPGAs? If the latter, can you give me any pointers to materials with which to educate myself?

As requested, here is a link to the syllabus and lab assignments.

Addition: Yes, it is a digital logic course too. When I got to my college, students were required to take one semester of each of computer architecture and digital logic, and I combined them into a single semester. Of course, that's a statement about the past, not the future.

Answer 1

Given the goals of the class, I think the TTL approach is fine, and I say this as an "FPGA guy". FPGAs are a sea of logic and you can do all sorts of fun stuff with them, but there's only so much that's humanly possible to do in a semester.

Looking at your syllabus, your class is a mix of the logic design and "machine structures" courses I took in undergrad. (Plus, it's for CS majors. I'm all for CS majors having to face real hardware--letting them get away with writing code seems like a step back.) At this introductory level, where you're going over how assembly instructions are broken down, I see no real benefit to having students do things in code versus by hand. Doing HDL means learning the HDL, learning how to write synthesizable HDL, and learning the IDE. This is a lot more conceptual complexity and re-abstraction. Plus you have to deal with software issues.

Generally the point of a course that uses FPGAs is to practice creating logic that is useful--useful for talking to peripherals, serial comms, RAM, video generators, etc. This is valuable knowledge to have, but it seems very much out of the scope of your course. More advanced classes in computer architecture have students implement sophisticated CPUs in FPGAs, but again, this seems out of the scope of your course.

I would at the very least devote a lecture to FPGAs. Run through a few demos with a dev board and show them the workflow. Since you're at Mills, perhaps you could contact the folks at Berkeley who run CS150/152 and go see how they do things.

Answer 2

One benefit of using TTL though would be that for the very elementary circuits, the details of the HDL would sort of mask the actual circuitry, and most students would simply spend most of the time writing and learning HDL. I think TTL's for the first part and then FPGA for the architecture part would be better, since it's hard to actually make a programmable system with TTLs.

Answer 3

I very much agree with Photon. There are many advantages to using FPGAs. Here are a few interesting points to consider:

1) Easy platform for trying out a gate design very quickly, without hours or potentially days of work wiring things up. FPGAs allow potentially very complex digital designs quite easily. (MUCH more theory, less busywork)

2) Significant portions of a student's work could be done in simulation outside of the lab.

3) The software environment is free (generally including the simulator).

4) There are many relatively cheap FPGA platforms around. Academic pricing should help. Something like the Terasic DE0-Nano is $59 for a complete kit (and it looks pretty good). $50-60 looks to be the per-board range you'd be looking at.

5) There's a lot of really cool stuff to do with FPGAs. There are sites like OpenCores that provide hundreds of prebuilt modules for use with FPGAs. There's FPGA4Fun, which has a lot of tutorials and projects. For pure entertainment, FPGA Arcade is dedicated to building games with FPGAs. Depending on what you set up around the FPGA boards, this could make for a really fun class.

6) Some boards have digital design classes apparently ready-made for them: Intro to Digital Design (warning: large download) using a slightly old Xilinx Spartan 3E-based board. (Although that one's based on ActiveHDL, I'd personally prefer a more standard VHDL or Verilog) The major FPGA vendors also have university programs: Xilinx University Program, Altera University Program, Lattice University Program.

7) The workflow is much closer to how professional design work happens these days. Working knowledge in FPGA development is an immediately marketable skill.

Answer 4

I think that nowadays if you're dealing with things at the gate level, you're not working in the area of "computer architecture", you're really just doing basic digital electronics. But also, you can't teach everything there is to know from gate-level digital electronics up to caching algorithms, parallel computing architectures, SIMD, networking, etc, etc in a single semester.

So it really comes down to what you want to teach. If you want to focus on gate-level digital electronics, then working with gate-level chips will give students something hands-on to work with and give them a stronger understanding of that material. But if you want to teach computer architecture, they probably need to be working at a much higher level of abstraction than AND and OR gates.

At the very least, you probably owe it to yourself to learn an HDL and implement an FPGA-based design or two, so that you (as the education expert here) can assess how those skills would fit into your goals for your students. I expect that other answers will give lots of pointers to low and no-cost materials that will let you get up to speed on FPGA design in a short time. (Hint: Xilinx and Altera both offer free software design tools and simulators, along with tons of application notes and other teaching materials).

Answer 5

Stick with basic TTL devices on the benchtop... at least for the start of the course.

One of the things that is very cool about chaining individual gates together on the desktop - particularly if you use slower devices - is you can have the students put a scope on the inputs/outputs. Make sure your lab notes include unstable designs with feedback to cause oscillation and ask the students to explain why it oscillates.

There's a lot of things that are important here. Rise/fall time is measurable on even a basic scope and so is propagation delay. It's very important that the students learn that digital logic is just an analog process with preset thresholds for "on" and "off". Those real-world behaviors become increasingly important as the transition rate and complexity of the logic increases. For an introduction to computer architecture course where you're building a very basic MCU in a FPGA, propagation time (even inside the FPGA) will place an upper limit on the MCU clock rate before it begins to behave unpredictably.

I found that most students didn't understand the physical reality of digital circuits until they actually saw them on a scope, and it's still too easy to fall into the trap of assuming transitions are instantaneous and waveforms are perfect squares.

You have a whole semester, so you don't need to dedicate more than a couple of weeks of teaching time to ensuring the students understand the real-world implications of the digital circuits they're working with.

Then move onto translating that to HDL and building things in FPGAs if it's where you want to go, but there's no substitute for building things on the bench and examining their real-world behavior.

Answer 6

I think the right approach would be to start with building a few gates out of relays, which are easy to see and understand but are obviously too slow and power hungry for modern applications. Then show how transistors may be used to do the same thing more compactly, more quickly, and more efficiently, and packaged gates [e.g. "quad nand"] can do it even better yet. Once you've gotten to that point, I'd suggest that you show how to build a things like multiplexers and latches out of gates, and then how somewhat larger structures can be built out of packaged multiplexes, latches, etc. Nobody is going to build a computer nowadays by physically soldering together countless thousands of discrete transistors, but the internal operation of a computer is very much like that of the transistors except that everything is much smaller.

One major benefit I think students would get from this sort of instruction is an understanding of why many things work as they do. For example, if one were "simulating" an instruction set which didn't need to have any practical physical realization, there would be no need to have a "load memory" instruction take three cycles while most other instructions take one. Some things could be understood without going down to the transistor level, but a few can't (e.g. the significance of synchronous versus asynchronous inputs).

Answer 7

Fully appreciating the importance of some hands-on experience with physical circuit assembly, I think it's also important to recognize that you cannot cover modern computing practices without some level of something that "feels like" simulation or hide-too-much abstraction, so the best you can do is to try to do some work at each level before adding in enough abstraction to make attempting the next level of complexity plausible. The MIT course to which you refer for example, at one point started doing a software simulation of a 32-bit RISC machine running atop of the chips & modules 8 bit microprogrammed machine that was physically "built". At that point, I'd argue it's more effective to just implement such a machine in an FPGA (something I suspect they've probably done since).

In light of this, my temptation would be to try to include both a chips & wires phase early on, and an FPGA phase later in the course. Since you already have the breadboard kits you could just keep the early labs on that, and use either an FPGA board or maybe a breadboardable FPGA module for the later labs. Building a hybrid machine where the FPGA depends on some outboard circuity implementing part of the processor would be possible, but would feel very artificial - just switching technologies entirely at the point where the complexity exceeds one breadboard piece might be most realistic.

You should be able to source existing stand alone FPGA boards for less than $100/ea at educational pricing.

Another option, could be to construct your own as part of the class, perhaps building an FPGA serial-loading interface as the first part of the project. A nice advantage of this is that the cost would come in low enough that the students could keep their boards instead of having to turn them in at the end of the term, which would hopefully result in ongoing interest and awareness amongst a handful.

Answer 8

Discrete TTL devices are not a bad idea, but I think that discrete CMOS 4000 is an even better idea for teaching introductory digital stuff.

There are definitely benefits to the almost-50-year-old CD4000 family in the context of a lab-based course.

1. all the relevant parts are still available from TI in DIP packages, and usually are in stock
2. they are CMOS devices, just as pretty much all of digital logic made today (vs. the bipolar TTL)
3. they have low power consumption that's proportional to clock speed - when stopped, they are essentially open circuits, and at audio frequencies they are micropower and can run from 3V coin cells or 2x1.5V button cells
4. the inputs are essentially open circuits at DC, and about 5pF at AC; the static fanout is infinite (vs. the pain that it is in TTL)
5. they run just fine from unregulated power supplies
6. they work from 3V to 15V supplies, and the supply voltage modulates their speed: at 3V those are slow and benign devices, and a 10-20MHz oscilloscope is all you need to accurately represent the signals!
7. 12V supply will assure highest speed achievable with that family, without the worry of destroying the chips if the supply is a couple volts off
8. 9V-12V supplies are typical and guarantee as good a performance as you'll get from that family
9. the output slew rates are 1-2 orders of magnitude slower than those of more modern logic families: there are few if any signal integrity problems even when designs are laid out on solderless breadboards
10. the noise margins are very generous at higher supply voltages
11. the outputs are short-circuit-proof
12. the outputs can be paralleled for higher drive strength - just as you would in an ASIC by changing the channel width of the output stage - and are "weak" enough to observe such effects easily even with crude measurement techniques
13. the CD4007UB chip with 3 PMOS and 3 NMOS transistors allows gentle introduction to techniques relevant in transistor-level logic design: weak vs. hard drivers, transistor stacking for two-three input gates, Schmitt triggers, pass gates, etc.
14. AND, OR, NAND, NOR are available in 2, 3, 4 and 8-input variants
15. many devices in the family work in sub-threshold nanopower regime at voltages much below 3V; sub-threshold operation is in production use in nanopower circuitry and is quite relevant
16. there is enough variety to demonstrate more advanced techniques, e.g.:

• CD4048 is a wide programmable gate, for implementing complex programmable combinatorial logic equivalents, or makes a convenient "universal building block" with up to 9 inputs

• CD4089 and CD4527 rate multipliers allow (slow) digital facsimiles of analog computers - you can be solving differential equations, etc.

• CD4068, 78, 85, and 86 wide-input gates allow 1:1 implementation of programmable combinatorial logic (unregistered PALs)

• CD4007, 16, 53, and 66 are pass gates (in more or less disguise)

As of January 2022, the following devices were orderable in PDIP from TI - they all are CD4xxxBE part numbers unless indicated otherwise:

4001-4002, 4007, 4009UBE, 4010-4031, 4033, 4035, 4040, 4041UBE, 4042--4048, 4049UBE, 4050-4056, 4060, 4063, 4066, 4068, 4069UBE, 4070-4073, 4075-4078, 4081-4082, 4085-4086, 4089, 4093-4094, 4098-4099, 40102-40103, 40105-40107, 40109-40110, 40117, 40147, 40160BF (CDIP), 40161, 40174-40175, 40192-40194, 40257, 4502-4504, 4508BNS, 4510-4512, 4516-4518, 4520-4522, 4527, 4532, 4536, 14538, 4541, 4555-4556, 4572UBE, 4585, 4724.

The above also happen to be the widely applicable devices in the CD4000/MC14000 family. Some of them are hard to find using the function searches on the TI website, and it took me a while to collect the list above.

About the only function that's sadly missing from that list -- and not in regular manufacture today -- are the parallel adders. If you insist on having them, and can buy about a hundred at a time, I'm sure Rochester Electronics may have some. Otherwise, it's not too hard to build them from the variety of gates available.