I tried with some configurations in which 16+16 MOSfets of 240A each (really they are case limited to 80-90A because of source terminal, but i doubled this termminal with a very thick copper wire for each of them.) were configured in a very symetrical arrangement, 16 MOSFETS in transistor position and 16 in synchronous rectifier configuration, and they still seems to fail at some points and I can't figure out how to avoid failure.
They were attacked all with a IR21094S as driver, and each 2 transistors were driven by a MOSFET totem-pole TC4422 driver. The motor is a 10kW dc compound motor, that is 200A nominal and take probably 1600A at start. The inductance seems to be 50uH, the rising current speed in pulses is = 1 A/µs at 50V Frequency chosen is 1kHz, PWM buck with synchronous rectification configuration
I can't figure out why, even the circuit was carefully made, with 4 modules symetrically supplied and with separate output conductors up to motor, and with independent snubbers, and with a motor snubber, transistors still fails. The circuit seems to work fine but, after some time, like tens of minutes (temperatures are normal, some 45 C) usually at accelerations, usually synchronous diodes fails, followed by all the transistors
I initially tried to sense current on MOSfets using a small mosfet in parallel (drain-drain, gate/gate through a zenner, source of small mos to a 22 ohms resistor and after to a voltage amplifier to activate a fast-shutdown protection circuit), but because of faster commutation time the small mosfet entered always before the main transistor, disturbing the protection circuit and making it unusable...
There is not shot-through, i used 2us gap through driver, i only suspect assimetry in the parasitic inductances . How many MOSFETs did you guys paralleled succesfully and in what conditions?
One of the 8 power modules
All power modules
Some of the drivers
Half of the assembly
All stack, without capacitors
Output signal
Falling edge, output yellow, 48V supply blue Supply is sustained only by some sporadically distributed 100uF and 100nF ceramic capacitors, to avoid MOSFET burns by initial tests mishandling
Rising edge; you can see the overshoot is very small, only 5 volts. transistors are at 75v rating