Since the comparator is always active and is effectively an analog circuit it can generate an output at any time regardless of the current CPU task. This can be used to generate an interrupt for a near instantaneous response to the input crossing the threshold.
The ADC, on the other hand, has a settling time, conversion time, is usually multiplexed, has to be polled periodically and requires code. All of these make it a much slower solution to the comparator.
Comparator works in sleep mode
The device can be configured to wake on comparator changing state. See page 128 of the datasheet. There is a power penalty as the reference voltage and comparator have to be powered on. I don't think there is a comparable wake-up for ADC.
Are there situations in which one would be more accurate than the other?
Yes. If the reference signal is analog the threshold doesn't have to be a discrete digital step value. (This may be masked by differences in the two inputs so it might not be that relevant.)
Will the either the comparator of ADC be more sensitive to small differences in input?
As above. It depends on the quality of the comparator.
One use case mentioned for the bipolar differential mode of the ADC was to determine the polarity of a signal. Wouldn't the comparator be better suited for this?
I had to do some reading on this. I think your interpretation of bipolar might be incorrect. The chip has a unipolar supply of 1.8 – 5.5 V so it would be unlikely to be able to accept negative voltages on the ADC or comparator. This is confirmed by section 20.1.
Figure 1. Absolute maximum ratings.
Instead, bipolar means that the ADC can carry out a measurement with respect to another positive reference and the result can be positive (if input > ref.) or negative (if input < ref.) with respect to the reference.
Figure 2. The ADC schematic on page 133.
Figure 2 shows the innards. The positive input MUX (multiplexor) (1) determines which input is fed to the gain amplifier (3). The negative input MUX (2) is fed to the other input of the gain amplifier. This stage is programmable and feeds to the normal ADC (4) via the single ended / differential selection.