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Imagine I have the following scenario: Having a +5V rail powering an MCU and several other peripheral ICs, let's assume in this case a voltage reference (for example 4096mV). The output of this voltage reference is further assumed to be connected to an ADC pin of the MCU. (The same should then apply to a digital signal connected to a GPIO pin)

Now, the datasheet of the MCU states VCC +0.3V or 6V, whatever is lower as the absolute maximum rating on any of its pins. During startup, is it thus necessary to employ power sequencing in order to guarantee that the voltage reference doesn't output any voltage greater than 0.3V before the MCU is fully powered up or is it common practice to just connect both to the same power rail? (Even though the MCU might take longer to power up)

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It is common practice to connect both ICs to the same power rail and to reset the ICs some time after the power lines are "up". This reset is usually generated using a resistor and a capacitor, the charging of the capacitor takes some time and during that time the chips are kept in reset mode. Only after some time (when the power lines are OK) the reset will be released.

Probably the MCU's ADC will not even be connected to the input pin at startup, you might have to enable it in software first.

Separating the power rails actually increases the chance to have a situation where one IC feeds the other IC through the ESD protection diodes. That usually does not damage anything but it is an undesirable situation nonetheless. The VCC +0.3V or 6V, whatever is lower requirement of the MCU is there to prevent this situation. For an explanation on why and how, see the video Dave Jones from the EEVBLOG made here.

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  • \$\begingroup\$ This video was exactly what I was looking for. Thank you! \$\endgroup\$ – fscheidl May 10 '16 at 8:18
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    \$\begingroup\$ My pleasure :-) That video explains a lot if you didn't know about it and you should know about this as these ESD diodes are in every IC. \$\endgroup\$ – Bimpelrekkie May 10 '16 at 8:22

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