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I'm working on XAPP495 on Digilent Atlys board with ISE 14.7 I want to run and test "vct_demo" coming with the XAP 495. I tried to compile it (with ISE 14.7) and failed because of the following errors:

ERROR:PhysDesignRules:2502 - Issue with pin connections and/or configuration on block::. BUFIO2 has an invalid setting of DIVIDE by 2. This setting is not supported. For more information please see Answer Record 56113.

ERROR:Pack:1642 - Errors in physical DRC.

I simply imported all the *.v files as well as the corresponding *.ucf

Can this here be a simple version issue? - Is it a matter of error level which is stricter than in former versions?

Any help is appreciated.

Thanks

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Welcome to the world of Xilinx :)

The problem is known, and I don't think they maintain this app very actively and if you search for the Answer Record mentioned in the error list, you will see that it requires some changes in the example code to make it compile with newer versions of ISE.

You can find the solution to your problem at:

Discussion about the problem with Digilent/Xilinx Example design at Xilinx forum

You need to modify the vtc_demo.v to:

// Original code, doesn't work on ISE >= 14.6
//  BUFIO2 #(.DIVIDE_BYPASS("FALSE"), .DIVIDE(2))
//  sysclk_div (.DIVCLK(clk50m), .IOCLK(), .SERDESSTROBE(), .I(sysclk));

  wire clkfb;

   DCM_SP #(
      .CLKDV_DIVIDE(2.0),
      .CLKFX_DIVIDE(1),
      .CLKFX_MULTIPLY(4),
      .CLKIN_DIVIDE_BY_2("TRUE"),
      .CLKIN_PERIOD(10.0),       
      .CLKOUT_PHASE_SHIFT("NONE"),
      .CLK_FEEDBACK("1X"),        
      .DESKEW_ADJUST("SYSTEM_SYNCHRONOUS"),
      .DFS_FREQUENCY_MODE("LOW"),         
      .DLL_FREQUENCY_MODE("LOW"),         
      .DSS_MODE("NONE"),                  
      .DUTY_CYCLE_CORRECTION("TRUE"),     
      .FACTORY_JF(16'hc080),              
      .PHASE_SHIFT(0),                    
      .STARTUP_WAIT("FALSE")              
   )
   DCM_SP_inst (
      .CLK0(clk50m),
      .CLK180(),    
      .CLK270(),    
      .CLK2X(),     
      .CLK2X180(),  
      .CLK90(),     
      .CLKDV(),     
      .CLKFX(),     
      .CLKFX180(),  
      .LOCKED(),    
      .PSDONE(),    
      .STATUS(),    
      .CLKFB(clkfb),
      .CLKIN(sysclk),
      .DSSEN(1'b0),  
      .PSCLK(1'b0),  
      .PSEN(1'b0),   
      .PSINCDEC(1'b0),
      .RST(1'b0)      
   );

   BUFIO2FB #( .DIVIDE_BYPASS("TRUE") )
   BUFIO2FB_inst ( .O(clkfb), .I(clk50m) );
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