# Why (not) put a resistor on FET gate?

While thinking of ways to protect a MOSFET one idea was to put an extremely high resistance in front of the gate: The idea being that current is never supposed to flow through the gate, so if some transient threatened the gate, the resistance would limit that current, possibly preventing the FET from burning out.

In fact, while researching MOSFET protection I came across this integrally protected product that includes in its features "internal series gate resistance," as shown on its diagram:

If this idea is correct, then the question is: Why not always put a megaohm resistor before the gate of any FET?

Or is there a practical reason that a gate resistor would not typically protect the FET? Or could it even have any adverse performance effects?

• If something has broken down who cares about the FET any more - the circuit is bust period. May 11, 2016 at 17:29
• Note that the RG you show is useless as a protection mechanism unless the second pair of (zener) diodes is also present. It is voltage that destroys the gate isolation, not current. May 11, 2016 at 17:36
• @Andyaka - I was using "break-down" loosely, to include transient events that would ideally not occur, probably wouldn't show up in a simulation, but which do show up in practice. E.g., cheap power supplies that don't provide very smooth power, or even inadequate ESD countermeasures. If the most sensitive piece of the circuit can be wired to survive transient break-downs then often we want to just keep working rather than scoping, stress-testing, and re-engineering the circuit to perfection. May 11, 2016 at 17:56

The gate source is essentially a capacitor. So with this high resistor, it would take a very long time to charge. The MOSFET will only turn on when the gate capacitor is charged above some level (the threshold voltage), so you will have very slow switching.

The reason gate drivers are often used is because they are able to quickly charge the gate capacitor (often using current above 1A) so switching times can be minimized.

You can read more here.

• Yes, exactly. Pull-up/down resistors for FETs are usually on the low side, like <1k. May 11, 2016 at 16:57
• Which also means you'll spend more time with the gate voltage in the "no man's zone" between on and off. Depending on the circuit design, that can cause you problems. May 12, 2016 at 7:50
• Yes, most likely the MOSFET will get very hot if you spend a lot of time in that zone. May 13, 2016 at 11:53

Big resistors on the gate slow down the switching of the MOSFET. This is OK when you are using the MOSFET as a switch (ON-OFF) but when you're driving a motor at a 20kHZ frequency and above, switching should be fast to minimize the heat losses (switching faster means less power lost). Note that the resistor you see at the gate is not intended to only protect the MOSFET... it also protects whatever's driving the MOSFET (for example: a microcontroller). Excessive current may rush and damage the I/O pin.

As Darko said, the MOSFET is a capacitor when you look at it from the gate side. The charge needed for this capacitor to fully charge is called the gate charge (you can find it in the datasheet). Once charged, the MOSFET's resistance (RDS) decreases to its minimum. So you can understand that trying to drive this pin without a series resistance means high current will be sunk/sourced by the driver (same as inrush current when charging a capacitor).

• "it also protects the one whos driving the mosfet" - I would say that, in fact, it protects the overvoltage Zeners, and possibly whatever sits at the drain. May 12, 2016 at 16:24
• In the datasheet, this resistor is considered as a feature:"Internal Series Gate Resistance". This mosfet is intended to operate with low voltages with Rds ~150mOHM at 4V. The feature means that the user can drive this mosfet directly from a low-current driver such as a microcontroller output pin buffer. Your absolutely right that it also protects the zener and limit the current to the drain when clamping.
– fhlb
May 13, 2016 at 9:30
• You're right. The R also protects the IO pin from overvoltage at the drain! May 13, 2016 at 9:51

Edit: Re-interpreting the value shown on the datasheet. The resistance shown is not M$\Omega$, much lower, more like 3400 ohms based on the change in the switching times with external gate resistor.

This does in fact really slow the switching when the gate charge is high, such as the 1.6ms minimum off switching time with a 15V 1.5A load. The asymmetric switching time implies they may actually have a diode across the resistor to speed the 'on' time. The diode will be reverse-biased when clamping, as explained below.

A large value resistor will not likely protect the gate anyway, it's a permanent breakdown and insulation damage that occurs, not like a diode breakdown. That's why the ESD zener diodes are on the gate lead, to prevent excessive gate-source voltage.

So, why put any resistor at all in there you ask? Well it's so the other (Overvoltage) zeners can do their thing. Imagine the worst case and we short the gate lead to the source, and then sadistically increase the voltage on the drain (through some external load) waiting for the D-S breakdown. When the current through the zener diodes exceeds some mA the MOSFET turns on and clamps the overvoltage.

Power MOSFETs are generally not very sensitive to ESD anyway, because of the large gate capacitance. The gate actually breaks down at something like 50V-100V typically so a lot of energy has to reach the gate. Tiny MOSFETs such as RF MOSFETs are very sensitive to ESD in comparison. However, the typical human body model of ESD is enough to damage even a moderately large power MOSFET gate.

• The ~9ohms is probably the junction resistance from the metal to the gate Tungsten Nitride layer. May 11, 2016 at 18:32
• @bdegnan It appears to be the value of an external resistor with the same name as Rg in the internal schematic. May 11, 2016 at 18:47

There is another reason to put a series resistor in front of a MOSFET gate - to deliberately slow down switching. This helps minimise slew rates in the circuit and hence can reduce conducted and radiated emissions, which can be a useful EMC technique.

However, to be clear that is absolutely not what the resistor shown is included for - as others have noted, that is there to keep the clamping Zeners in the safe operating region. Also, note that slowing down switching edges has negative effects (increased thermal losses at switching edges being one) on circuit performance - as such any use of this technique is a compromise.

A gate series resistor can be used if a zener diode is also used to limit the gate source voltage to less than the Vgs rating of the MOSFET. The typical rating is 20V, and a 10V or 15V zener would be used.

For fast turn on/off, a small capacitor can be placed in parallel with the resistor. Assuming the capacitor is initially discharged. When you turn on the FET current will flow through the capacitor and there will be nearly instantaneous charge division between the capacitor and the input capacitance of the FET. The FET will turn on instantly. Your turn on speed will be nearly identical to what would happen if the capacitor were a short during the edge of the gate drive waveform. The same effect works at turnoff.

The gate charge division works as follows. Assuming the gate voltage and voltage across the capacitor are initially 0 then at turn on...

V_c = Qg / C_drive
Vgs = V_drive - V_c_drive

V_drive is the gate drive voltage.
Qg is the total gate charge listed in the FET datasheet for the given Vgs = V_drive
C_drive is the capacitor in parallel with the drive resistor.
Vgs is the FET gate source voltage.
V_c_drive is the voltage across C_drive after the switch.

For example if you drive the FET through a 10nF capacitor with a 10V drive signal, and the total gate charge was 1nC at Vgs=10V then the capacitor would charge to...

V_c_drive = 1nC/10nF = 0.1V
Vgs = 10V - 0.1V = 9.9V

Note this is of course an approximation since Vgs is not 10V so Qg is actually slightly less than assumed.

The effect of the parallel gate resistor is to always tend to make the voltage across the capacitor 0V. So after the switch the capacitor voltage will slowly fall from 0.1V to 0V at the rate of the R*C time constant. In a turn off cycle the charge would divide the other way so the final capacitor voltage would be -0.1V when measured with the same orientation used at turn on.

Note that you need not wait for the capacitor to discharge before switching the FET off. If you were to switch the FET from on and then to off right away the charge division in turning off would exactly cancel what happened during turn on and the capacitor voltage would be nearly 0 at the end of the cycle.

The capacitor value should be large enough that the total gate charge of the FET at the desired drive voltage yields only a small capacitor voltage, but small enough that it won't let much transient energy through. Typically you should have C_drive > Qg/1V.

The amount of resistance you can use depends on the worst case gate leakage current in the MOSFET datasheet as well as your zener leakage. The important point being that the total leakage times the series resistance must be much less than the MOSFET threshold voltage over temperature.

For example if your FET threshold voltage is 3V then R * leakage_current must be much less than 3V. The point is to prevent leakage from overwhelming the resistor and creating a DC bias that keeps the FET on or off at the wrong time.

Most FETs list a gate leakage of under 1uA max in their datasheet. Most zeners leak several uA and the leakage increases exponentially with temperature. So the zener accounts for most of the gate leakage. So 100K or 10K is probably more appropriate than 1MEG in my opinion.

• In other words: Yes, the resistor can protect the gate from transients, and it can even do so without impeding FET performance if a capacitor is wired in parallel to the gate? I'm inclined to accept this as the answer if you can clarify your penultimate paragraph -- perhaps with a detailed example. As presently worded I don't follow the relationship of (leakage current times resistance) to (Vth vs temperature). May 11, 2016 at 18:44
• No, no, no. The fet gate leakage will NOT be uA unless it is a monster power fet or it has built-in zener protection (which very many small FET's do have). Without the Zener, a garden variety FET will have nA of leakage. But good answer other than that one detail. May 12, 2016 at 3:34
• Even with capacitor, the performance of the mosfet would be affected. But this can be fine if moderate speed of switching is required. Time constant would be defined by resistor and that added capacitor. If you switch speedy enough that capacitor would charge (because it is discharged slowly only trough the resistor of high value) and will limit the voltage on the gate. If you switch slow enough it will have time to discharge and it's affect would be minuscule. May 12, 2016 at 14:15
• @Darko. I disagree with that. An appropriately sized capacitor will have nearly 0V across it both before and after a turn-on or turn-off edge. The purpose of the capacitor was to bypass the resistor making it irrelevant during the turn on/off edges. So the FET will turn on at normal speed as if the capacitor was a short. The resistor in parallel with the capacitor will tend to always drive the capacitor voltage to 0V, so it will never charge to any significant value. May 13, 2016 at 1:40
• @ feetwet. To clarify, the capacitor is wired in parallel with the gate drive resistor Rg (not in parallel with the gate/source terminals themselves). In the case of a device with an internal resistor like the NID9N05CL its not possible to add the capacitor in parallel with Rg since one side is hidden inside the device, but when adding an external Rg it is possible to use the capacitor. May 13, 2016 at 1:46