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I have been working on a current source and sawtooth core VCO based on the Electronotes/Aaron Lanterman/Ian Fritz designs/ideas.

I have breadboarded out the attached VCO schematic; the transistors are an NPN array on a 3086 IC. The transistors I've used are the matched pair on the chip. Some of the resistors are trimmer or pots on the BB also but are resistors in the schematic.

I have found that the frequency of oscillation is too high (>100KHz sometimes). I also have found that the oscillator decreases in frequency over time and sometimes just abruptly stops.

The components in the schematic are approximations to some things I have tried on the breadboard to bring the frequency down to approx 50Hz - 2000 Hz, controlled by the value of the voltage into U1.

I am confused about how to derive an expression for the frequency of the sawtooth wave at output at U3.

For instance, I see the rate of charge of the sawtooth wave to be the rate of current sunk from the inverting input of U3 multiplied by R3. Of course, the output of U3 will charge until it reaches the reference voltage of the inverting input of U4. To decrease the frequency of the ramp charge, I have tried lowering R3 and increasing Rlimit (to reduce the current sunk from the oscillator). However, this has not worked. I have also tried increasing Rref to limit the current drawn by the current source. This has helped, I think.

Can anyone suggest a way that I can decrease the frequency?

Also, the oscillator tends to decrease in frequency over time, and I have not detected yet what component is responsible for this. Do you have any thoughts on this? I thought it would be connected to the transistor pair, or something temperature dependent. I am also using a temperature compensated resistor for the first inverting op amp.

Please let me know if you have any thoughts on this. I bet many of you have worked with similar designs.

Sawtooth core voltage controlled oscillator

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I am confused about how to derive an expression for the frequency of the sawtooth wave at output at U3.

The frequency is determined by the current coming out of the collector of Q2. This current charges C3 until Vcompref is reached. Then the comparator will trigger and discharge C3.

Voltage across C3 is determined by

  V = Ic(Q2)*t/C3.

Since you discharge at Vcompref the frequency is:

  f = Ic(Q2) / (VcompRef * C3)

With the values from your schematic Ic(Q2) will peak somewhere at VCC/Rref or 120µA. Plugging this into the equation above gives a peak frequency of:

  f = 120µA / (1.5V * 10nF) = 8000Hz.

This is the frequency you should get with Vcon at 0V. With increasing Vcon the frequency will drop because more current will flow through Q1 than Q2. The inverting nature of U1 makes sure that you get the positive response you want for synthesizer applications.

To reduce the frequency you have two options:

  1. Increase C3. If you double C3 the frequency will drop by factor two. The value you've choosen is reasonable though and I'd leave it as it.

  2. Decrease the current at Q2 collector. This is done by increasing Rref. Try 1 Megaohm as a start.

More important is a design problem around your comparator though:

You're working without any hysteresis. That means that it is not guaranteed that the comparator will completely discharge your timing capacitor C3.

The comparator will turn on (and discharge C3) as soon as Vcompref is reached and will turn off as soon as the signal drops below Vcompref. What you want is to discharge C3 down to 0V or so.

The only reason why your circuit somewhat works is the propagation delay of your comparator along with R3 and the parasitic comparator input capacitance working as a small delay.

Add a resistor from the comparator output back to the comparator non-inverting input. This gives positive feedback and will make sure that the comparator stays turned on until the voltage of C3 drops by a significant amount. The ratio of this resistor and R3 will define the amount of hysteresis. R3 seem to be way to small btw, I'd expect a value of 10k or so.

Fixing this will likely solve your high frequency problem as well. I would expect that the frequency you're getting is not the VCO but the comparator oscillating around Vcompref.

Also, the oscillator tends to decrease in frequency over time, and I have not detected yet what component is responsible for this. Do you have any thoughts on this?

Yep! Temperature dependence.

This is quite hard to get under control and is one of the more difficult part in VCO design.

You're using a CA3086 array for the expo converter: This chip does not guarantee matching of the transistor pair also it could be matched. A matched pair is only guaranteed in the CA3046 array. Same pinout! If you later find out that you're not able to dial in a good 1 Volt/octave response change the chip to CA3046.

Oh, have you connected the substrate pin of the CA3086 (pin 13) correctly? It should be somewhere at -2 to -5V.

Furthermore, you've mentioned that one of your resistors is temperature dependent. Which one, and what kind of temperature coefficient does it has?

Since you're using the CA30x6 array already you may want to have a look how Bob Moog solved the problem: He used one of the transistors as a temperature sensor and another transistor as a heater to keep the silicon die at a constant temperature above ambient (45°C or so). This solves the problem without temperature compensation resistors (Google Moog Prodigy Schematic).

And finally: In your VCO I'm missing the Franco compensation resistor. This resistor, typically 680 ohm, is in series with your timing capacitor C3 and compensates for the finite time it takes to discharge C3. You want this resistor, otherwise your oscillator will go flat at higher octaves.

I bet many of you have worked with similar designs.

Yep! A CA3046 expo-converter based VCO is on my desk right now doing tuning stability tests over night :-)

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  • \$\begingroup\$ Thank you for the note about the substrate for the 3086. I did not know I needed to connect this pin. I re-read the datasheet and saw that I needed to connect this to "the most negative point in the external circuit" which in this case is -12V however. Next it says that "to maintain undesirable coupling between transistors, pin 13 should be maintained at either AC or DC ground." This is confusing to me. On one hand it says I should connect it to -12V, then instead I should connect it to ground, and you mention -2 to -5V. Which would be the best connection? \$\endgroup\$ – Thomas Wilk May 15 '16 at 21:46
  • \$\begingroup\$ This is the 2k temperature compensated resistor I have been using link. I have seen the designs that use the 3300 ppm resistor here. At this exact moment I can't locate the change of resistance vs. temperature curve for this resistor, but I think someone recommended me this resistor in the past. I would have to reconfirm though that it meets the 3300 ppm spec. \$\endgroup\$ – Thomas Wilk May 15 '16 at 21:56
  • \$\begingroup\$ @ThomasWilk Pin 13 (Substrate) should be the most negative pin of the CA3086. No pin of the expo-converter transistor pair goes below -1V or so, so it's fine to connect the substrate to -2V. The datasheet gives a maximum substrate to collector breakdown voltage of 20V. In your case connecting it to -12V would be fine, if you use other transistors make sure you don't exceed this limit. \$\endgroup\$ – Nils Pipenbrinck May 16 '16 at 10:59
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is the circuit in the middle, involving Q1, Q2, D1, and U2, a linear to exponential converter? (so the response is something like 1 octave per volt rather than something like 100 Hz per volt.) otherwise i cannot imagine its purpose.

U1 appears to be an inverter: Vcon = -(Rf/Rc) Vc. i think that VB is 2/3 of Vcon.

Q1 and Q2 appear to be a difference amplifier (like the input to an op-amp). that means the difference between the currents flowing into the collectors of Q1 and Q2 are proportional to the to the voltage difference at their bases, which is VB-0. U2 acts in such a way, using negative feedback that holds Vref to 0. that means the current flowing into the collector of Q1 is a constant VCC/Rref.

so it appears that the current flowing into Q2 and outa C3 is proportional to VB with some offset related to VCC/Rref, but i have to review how to do difference amplifiers to figure out what the proportionality is. doesn't seem to be an exponential amplifier, unless i am misunderstanding the role of D1.

this current into (or outa) C3 determines the ramp rate of the VCO and is directly proportional to the frequency. U4 serves as a comparator and when rampOut exceeds VcompRef, then J1 will turn on and discharge C3. then the ramp starts all over again.

unless that Q1, Q2 circuit serves a better purpose than just a difference amp, i do not see why it's there at all.

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  • \$\begingroup\$ Q1 and Q2 are a linear to exponential converter with first order temperature compensation. They turn the voltage at VB into a exponential current at Q2s collector. E.g. Ic(Q2) = e^VB*somefactor \$\endgroup\$ – Nils Pipenbrinck May 11 '16 at 23:58
  • \$\begingroup\$ so you get that by applying the Eber-Molls equations to Q1 and Q2? does D1 play a mathematical role? \$\endgroup\$ – robert bristow-johnson May 12 '16 at 0:20
  • \$\begingroup\$ Yes, Ebers-Moll. Here is a great write-up on this topic: schmitzbits.de/expo_tutorial/index.html . Regarding D1: I don't know what D1 and R6 are supposed to do. \$\endgroup\$ – Nils Pipenbrinck May 12 '16 at 0:49
  • \$\begingroup\$ D1 and R6 are supposed to compensate for an undesirable voltage change at high frequencies. For now I have removed them from the circuit. They are supposed to prevent high frequency pitches from going flat of their intended value. There is a write up of it in Hal Chamberlain's Musical Applications of Microprocessors \$\endgroup\$ – Thomas Wilk May 15 '16 at 21:59
  • \$\begingroup\$ oh, i have that book. nice original copy of it. \$\endgroup\$ – robert bristow-johnson May 16 '16 at 1:57

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