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I am trying to set PLL as my system clock source upon startup of my microcontroller, STM32f103

I have commented all the defines in my system_stm32f10x.c

/* #define SYSCLK_FREQ_HSE    HSE_VALUE */
/* #define SYSCLK_FREQ_24MHz  24000000 */ 
/* #define SYSCLK_FREQ_36MHz  36000000 */
/* #define SYSCLK_FREQ_48MHz  48000000 */
/* #define SYSCLK_FREQ_56MHz  56000000 */
/*#define SYSCLK_FREQ_72MHz     72000000*/

So my system starts with hsi(8Mhz) as the clock source. This I have verified to be working just fine. However when I try to initialize pll to set it as the clock source, the PLL Ready flag never sets.

//on boot the system core clock is set
//HSI @ 8Mhz. Set this to PLL with PLL source HSI
//to get the max sysclock of 64mhz

//ensure hsi is ready
while(RCC_GetFlagStatus(RCC_FLAG_HSIRDY)!=SET);

RCC_PLLCmd(DISABLE);
RCC_PLLConfig(RCC_PLLSource_HSI_Div2, RCC_PLLMul_16);
RCC_PLLCmd(ENABLE);

printf("1");
//wait till pll ready
while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY)!=SET);
printf("1");

//configure sysclk to use pll
RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);

//after changing clocks ALWAYS call this function to update
//the system clock variables
SystemCoreClockUpdate();

When I debug my code, I only get '1' in my debug output window which means the pll ready flag never sets.I have tried with lower pll multiplication factor with same result.

Any idea what could be going wrong here?

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    \$\begingroup\$ based on your suggestion I did. but it produced virtually the same code and the issue persists \$\endgroup\$ – Ankit May 16 '16 at 17:06
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Managed to solve the issue.

Changing Flash Latency to waitstate 2 (as described in STM32F103C8T6 Reference Manual page 57) fixed the issue.

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  • \$\begingroup\$ This didn't help in my case :( FLASH->ACR |= FLASH_ACR_LATENCY_1; \$\endgroup\$ – binaryBigInt Apr 22 '18 at 16:34
  • \$\begingroup\$ @binaryBigInt try wait state 2 \$\endgroup\$ – Ankit Apr 22 '18 at 16:43

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